@@ -525,17 +525,17 @@ void *rt_hw_mmu_v2p(struct rt_aspace *aspace, void *vaddr)
525525 return (void * )paddr ;
526526}
527527
528- static int _noncache (rt_base_t * pte )
528+ static int _noncache (rt_ubase_t * pte )
529529{
530530 return 0 ;
531531}
532532
533- static int _cache (rt_base_t * pte )
533+ static int _cache (rt_ubase_t * pte )
534534{
535535 return 0 ;
536536}
537537
538- static int (* control_handler [MMU_CNTL_DUMMY_END ])(rt_base_t * pte )=
538+ static int (* control_handler [MMU_CNTL_DUMMY_END ])(rt_ubase_t * pte )=
539539{
540540 [MMU_CNTL_CACHE ] = _cache ,
541541 [MMU_CNTL_NONCACHE ] = _noncache ,
@@ -565,14 +565,14 @@ int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size,
565565 int err = - RT_EINVAL ;
566566 void * vend = vaddr + size ;
567567
568- int (* handler )(rt_base_t * pte );
568+ int (* handler )(rt_ubase_t * pte );
569569 if (cmd >= 0 && cmd < MMU_CNTL_DUMMY_END )
570570 {
571571 handler = control_handler [cmd ];
572572
573573 while (vaddr < vend )
574574 {
575- rt_base_t * pte = _query (aspace , vaddr , & level );
575+ rt_ubase_t * pte = _query (aspace , vaddr , & level );
576576 void * range_end = vaddr + _get_level_size (level );
577577 RT_ASSERT (range_end <= vend );
578578
@@ -755,4 +755,4 @@ void *rt_hw_mmu_pgtbl_create(void)
755755void rt_hw_mmu_pgtbl_delete (void * pgtbl )
756756{
757757 rt_pages_free (pgtbl , 0 );
758- }
758+ }
0 commit comments