feat(PRU-ICSSG): Add custom SRAM allocation documentation

Add a section explaining how to allocate custom SRAM regions for ICSSG
Ethernet. Also improve existing documentation for SRAM.

Signed-off-by: MD Danish Anwar <[email protected]>

Author: danish-ti

source/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.rst

@@ -877,30 +877,55 @@ Time Senstive Network (TSN) Offload Support
 SRAM Requirement
 ################
 
-The ICSSG Ethernet driver supports multiple instances of ICSSG each of which has two slices. Each ICSSG instance supports two Ethernet interfaces i.e. one per slice.
+The ICSSG Ethernet driver supports many instances of ICSSG each of which has two slices. Each ICSSG instance supports two Ethernet interfaces, one per slice. Static Random-Access Memory (SRAM) Required for each ICSSG instance (per two ports) is 256KB.
 
-SRAM Required for each ICSSG instance (per two ports) is as below.
+For each ICSSG instance, the SRAM required needs to be contiguous.
+PRUETH only uses the required amount of SRAM from the SRAM pool. If PRUETH does not get the required amount of SRAM, the prueth_probe() API will return with -ENOMEM error.
 
-.. ifconfig:: CONFIG_part_variant in ('AM65X')
+Allocating custom SRAM region
+*****************************
 
-  +------------------+--------------------------+-----------------------------------+
-  | SoC              | Mode                     | SRAM Required per ICSSG instance  |
-  +==================+==========================+===================================+
-  | AM65X SR 2.0     | Emac Mode                |             192 KB                |
-  +------------------+--------------------------+-----------------------------------+
-  | AM65X SR 2.0     | Emac Mode + Switch Mode  |             256 KB                |
-  +------------------+----------------------+---+-----------------------------------+
+By default, the ICSSG Ethernet driver uses the standard on-chip SRAM pool for its operation. However, in situations where this SRAM region is already allocated for other cores or purposes, you can define a custom SRAM region specifically for ICSSG Ethernet usage.
 
-.. ifconfig:: CONFIG_part_variant in ('AM64X')
+Follow these steps to allocate a custom SRAM region:
 
-  +-----------+--------------------------+-----------------------------------+
-  | SoC       | Mode                     | SRAM Required per ICSSG Instance  |
-  +===========+==========================+===================================+
-  | AM64X     | Emac Mode                |             192 KB                |
-  +-----------+--------------------------+-----------------------------------+
+- Define a dedicated SRAM subregion in the SoC's main device tree file
+- Update your board-specific device tree to point the ICSSG Ethernet driver to this custom SRAM region
 
-For each ICSSG instance, the SRAM required needs to be contiguous.
-PRUETH only uses the required amount of SRAM from the SRAM/MSMC pool. If PRUETH doesn't get the required amount of SRAM, the prueth_probe() API will return with -ENOMEM error.
+Example configuration:
+
+First, define the ethernet-specific SRAM region within the on-chip SRAM node:
+
+.. code-block:: dts
+
+   /* In arch/arm64/boot/dts/ti/k3-am64-main.dtsi */
+   &cbass_main {
+       oc_sram: sram@70000000 {
+           /* existing properties */
+
+           ethernet_sram: ethernet-sram@00000 {
+               compatible = "mmio-sram";
+               reg = <0x00000 0x40000>; /* 256KB allocation */
+               pool;
+           };
+       };
+   };
+
+Then, in your board-specific device tree, update the ICSSG node to use this custom SRAM region:
+
+.. code-block:: dts
+
+   /* In arch/arm64/boot/dts/ti/k3-am64-<board>.dts */
+   &icssg1_eth {
+       /* Replace the default SRAM reference */
+       /* sram = <&oc_sram>; */ /* Original line (remove or comment out) */
+       sram = <&ethernet_sram>; /* New custom SRAM region */
+   };
+
+.. note::
+
+   - The custom SRAM region must be at least 256KB per ICSSG instance
+   - The allocation must be contiguous and 64KB aligned
 
 Firmware name handling
 ######################