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feat(PRU-ICSSG): Add custom SRAM allocation documentation
Add a section explaining how to allocate custom SRAM regions for ICSSG Ethernet. Also improve existing documentation for SRAM. Signed-off-by: MD Danish Anwar <[email protected]>
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source/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.rst

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@@ -877,30 +877,55 @@ Time Senstive Network (TSN) Offload Support
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SRAM Requirement
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################
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The ICSSG Ethernet driver supports multiple instances of ICSSG each of which has two slices. Each ICSSG instance supports two Ethernet interfaces i.e. one per slice.
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The Industrial Communication SubSystem Gigabit (ICSSG) Ethernet driver supports multiple ICSSG instances. Each ICSSG instance has two slices. Each ICSSG instance supports up to two Ethernet interfaces, one per slice. Each ICSSG instance requires 256KB of Static Random-Access Memory (SRAM), regardless of whether the ICSSG instance is implementing single Ethernet Media Access Control (EMAC) (one port), dual EMAC (two ports), or dual EMAC + switch mode.
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SRAM Required for each ICSSG instance (per two ports) is as below.
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For each ICSSG instance, the SRAM required needs to be contiguous.
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PRUETH only uses the required amount of SRAM from the SRAM pool. If PRUETH does not get the required amount of SRAM, the prueth_probe() API will return with -ENOMEM error.
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.. ifconfig:: CONFIG_part_variant in ('AM65X')
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Allocating custom SRAM region
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*****************************
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+------------------+--------------------------+-----------------------------------+
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| SoC | Mode | SRAM Required per ICSSG instance |
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+==================+==========================+===================================+
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| AM65X SR 2.0 | Emac Mode | 192 KB |
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+------------------+--------------------------+-----------------------------------+
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| AM65X SR 2.0 | Emac Mode + Switch Mode | 256 KB |
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+------------------+----------------------+---+-----------------------------------+
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By default, the ICSSG Ethernet driver uses the standard on-chip SRAM pool for its operation. However, in situations where this SRAM region is already allocated for other cores or purposes, you can define a custom SRAM region specifically for ICSSG Ethernet usage.
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.. ifconfig:: CONFIG_part_variant in ('AM64X')
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Follow these steps to allocate a custom SRAM region:
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+-----------+--------------------------+-----------------------------------+
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| SoC | Mode | SRAM Required per ICSSG Instance |
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+===========+==========================+===================================+
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| AM64X | Emac Mode | 192 KB |
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+-----------+--------------------------+-----------------------------------+
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- Define a dedicated SRAM subregion in the SoC's main device tree file
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- Update your board-specific device tree to point the ICSSG Ethernet driver to this custom SRAM region
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For each ICSSG instance, the SRAM required needs to be contiguous.
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PRUETH only uses the required amount of SRAM from the SRAM/MSMC pool. If PRUETH doesn't get the required amount of SRAM, the prueth_probe() API will return with -ENOMEM error.
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Example configuration:
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First, define the ethernet-specific SRAM region within the on-chip SRAM node:
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.. code-block:: dts
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/* In arch/arm64/boot/dts/ti/k3-am64-main.dtsi */
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&cbass_main {
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oc_sram: sram@70000000 {
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/* existing properties */
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ethernet_sram: ethernet-sram@00000 {
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compatible = "mmio-sram";
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reg = <0x00000 0x40000>; /* 256KB allocation */
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pool;
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};
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};
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};
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Then, in your board-specific device tree, update the ICSSG node to use this custom SRAM region:
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.. code-block:: dts
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/* In arch/arm64/boot/dts/ti/k3-am64-<board>.dts */
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&icssg1_eth {
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/* Replace the default SRAM reference */
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/* sram = <&oc_sram>; */ /* Original line (remove or comment out) */
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sram = <&ethernet_sram>; /* New custom SRAM region */
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};
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.. note::
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- The custom SRAM region must be at least 256KB per ICSSG instance
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- The allocation must be contiguous and 64KB aligned
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Firmware name handling
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######################

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