tools/ci: Add c_module() testing for RP2 and STM32 ports.

Update CI scripts to test c_module() functionality:

- Remove USER_C_MODULES from ESP32 and RP2 CI builds (now using
  c_module() in manifest_test.py)
- Add ci_stm32_build_cmod function to test c_module() on STM32
- Update RP2 CI to use FROZEN_MANIFEST with manifest_test.py

This ensures c_module() is tested across multiple ports during CI.

Signed-off-by: Andrew Leech <[email protected]>

Author: pi-anl

.github/workflows/ports_stm32.yml

@@ -24,6 +24,7 @@ jobs:
       matrix:
         ci_func:  # names are functions in ci.sh
           - stm32_pyb_build
+          - stm32_build_cmod
           - stm32_nucleo_build
           - stm32_misc_build
     runs-on: ubuntu-22.04

ports/rp2/boards/manifest_test.py

@@ -6,3 +6,4 @@
 # Test user C modules (for CI only).
 c_module("$(MPY_DIR)/examples/usercmodule/cexample")
 c_module("$(MPY_DIR)/examples/usercmodule/cppexample")
+c_module("$(MPY_DIR)/examples/usercmodule/subpackage")

tools/ci.sh

@@ -229,7 +229,6 @@ function ci_esp32_build_cmod_spiram_s2 {
     ci_esp32_build_common
 
     make ${MAKEOPTS} -C ports/esp32 \
-        USER_C_MODULES=../../../examples/usercmodule/micropython.cmake \
         FROZEN_MANIFEST=$(pwd)/ports/esp32/boards/manifest_test.py
 
     # Test building native .mpy with xtensawin architecture.
@@ -471,7 +470,7 @@ function ci_rp2_build {
     make ${MAKEOPTS} -C ports/rp2 submodules
     make ${MAKEOPTS} -C ports/rp2
     make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO_W submodules
-    make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO_W USER_C_MODULES=../../examples/usercmodule/micropython.cmake
+    make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO_W FROZEN_MANIFEST=$(pwd)/ports/rp2/boards/manifest_test.py
     make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO2 submodules
     make ${MAKEOPTS} -C ports/rp2 BOARD=RPI_PICO2
     make ${MAKEOPTS} -C ports/rp2 BOARD=W5100S_EVB_PICO submodules
@@ -530,6 +529,12 @@ function ci_stm32_pyb_build {
     make ${MAKEOPTS} -C ports/stm32/mboot BOARD=STM32F769DISC CFLAGS_EXTRA='-DMBOOT_ADDRESS_SPACE_64BIT=1 -DMBOOT_SDCARD_ADDR=0x100000000ULL -DMBOOT_SDCARD_BYTE_SIZE=0x400000000ULL -DMBOOT_FSLOAD=1 -DMBOOT_VFS_FAT=1'
 }
 
+function ci_stm32_build_cmod {
+    make ${MAKEOPTS} -C mpy-cross
+    make ${MAKEOPTS} -C ports/stm32 MICROPY_PY_NETWORK_WIZNET5K=5200 submodules
+    make ${MAKEOPTS} -C ports/stm32 BOARD=PYBV11 MICROPY_PY_NETWORK_WIZNET5K=5200 FROZEN_MANIFEST=$(pwd)/ports/stm32/boards/manifest_test.py
+}
+
 function ci_stm32_nucleo_build {
     # This function builds the following MCU families: F0, H5, H7, L0, L4, WB.