Skip to content

Commit 65fe284

Browse files
kbieganskimajanickiwasilewskiJigoroskyArturBieniek4
committed
Add UVM Cookbook tests
Co-authored-by: Maciej Janicki <[email protected]> Co-authored-by: Jakub Wasilewski <[email protected]> Co-authored-by: Igor Zaworski <[email protected]> Co-authored-by: Artur Bieniek <[email protected]> Co-authored-by: Kamil Rakoczy <[email protected]> Co-authored-by: Bartłomiej Chmiel <[email protected]> Co-authored-by: Ryszard Rozak <[email protected]> Signed-off-by: Maciej Janicki <[email protected]> Signed-off-by: Jakub Wasilewski <[email protected]> Signed-off-by: Igor Zaworski <[email protected]> Signed-off-by: Artur Bieniek <[email protected]> Signed-off-by: Kamil Rakoczy <[email protected]> Signed-off-by: Bartłomiej Chmiel <[email protected]> Signed-off-by: Ryszard Rozak <[email protected]> Signed-off-by: Krzysztof Bieganski <[email protected]>
1 parent ff1eca9 commit 65fe284

File tree

40 files changed

+4843
-2
lines changed

40 files changed

+4843
-2
lines changed

‎.github/workflows/test.yml‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@ name: Verilator Verification Features Tests
22

33
on:
44
push:
5-
branches:
6-
- main
75
pull_request:
86
schedule:
97
- cron: "0 7 * * *"

‎.gitmodules‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,3 +13,6 @@
1313
path = tests/uvm-testbenches/axi-vip/axi-vip
1414
url = https://github.com/antmicro/axi-vip
1515
branch = verilator
16+
[submodule "third-party/uvm-examples"]
17+
path = third-party/uvm-examples
18+
url = https://github.com/syibin/UVM-related-topics

‎scripts/build-and-run‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@ execute_and_log() {
2727
setup() {
2828
echo "Starting build & run script..."
2929
execute_and_log "git submodule update --init --recursive"
30+
execute_and_log "git -C $MAIN_DIR/third-party/uvm-examples apply $MAIN_DIR/third-party/uvm-examples.patch"
3031
echo "Submodules are fetched and updated."
3132
}
3233

‎scripts/test-cookbook‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
#!/bin/bash
2+
set -e
3+
4+
if [[ -z "$1" ]]; then
5+
echo "Usage: $0 <test-directory>"
6+
exit 1
7+
fi
8+
9+
REPO_DIR=$(dirname $(cd $(dirname $0) && pwd))
10+
TEST_DIR="$REPO_DIR/tests/uvm-cookbook/$1"
11+
TEST_CONFIG="$TEST_DIR/test_config.sh"
12+
13+
if [[ ! -f "$TEST_CONFIG" ]]; then
14+
echo "Error: test_config.sh not found in $TEST_DIR"
15+
exit 1
16+
fi
17+
18+
# Setup configs
19+
GLOBAL_DISABLED_WARNINGS="\
20+
-Wno-ZERODLY \
21+
-Wno-SYMRSVDWORD \
22+
-Wno-style \
23+
-Wno-SIDEEFFECT \
24+
-Wno-NONSTD \
25+
-Wno-MULTITOP \
26+
-Wno-lint \
27+
-Wno-LATCH \
28+
-Wno-CONSTRAINTIGN \
29+
-Wno-REDEFMACRO \
30+
-Wno-INITIALDLY \
31+
-Wno-BLKANDNBLK \
32+
-Wno-TIMESCALEMOD \
33+
-Wno-COVERIGN"
34+
35+
GLOBAL_VERILATOR_FLAGS="\
36+
--binary \
37+
--Mdir verilator_obj_dir \
38+
--error-limit 15 \
39+
-j $(nproc) \
40+
-DSEQUENCER_WORKAROUND \
41+
-DADD_ATTRIBUTE_WORKAROUND \
42+
+define+UVM_NO_DPI \
43+
+incdir+$UVM_HOME \
44+
$UVM_HOME/uvm_pkg.sv"
45+
46+
# Default number of simulation runs
47+
SIM_ITERATIONS=1
48+
49+
source "$TEST_CONFIG"
50+
TEST_DIR="$REPO_DIR/third-party/uvm-examples/ref_uvc_design/uvm_code_examples/$TEST_NAME"
51+
52+
# Compose flags
53+
DISABLED_WARNINGS="$GLOBAL_DISABLED_WARNINGS $TEST_DISABLED_WARNINGS"
54+
VERILATOR_FLAGS="$GLOBAL_VERILATOR_FLAGS $TEST_VERILATOR_FLAGS"
55+
56+
echo "Running test: $TEST_NAME"
57+
echo " iterations: $SIM_ITERATIONS"
58+
59+
pushd "$TEST_DIR" >/dev/null
60+
61+
# Compile
62+
$VERILATOR \
63+
$VERILATOR_FLAGS \
64+
$DISABLED_WARNINGS \
65+
$SRC_FILES
66+
67+
# Run simulation (possibly multiple times)
68+
if ((SIM_ITERATIONS <= 1)); then
69+
args="${SIM_ARGS:-${SIM_ARGS_1:-}}"
70+
echo " sim run #1 args: '$args'"
71+
./verilator_obj_dir/Vuvm_pkg $args
72+
else
73+
for ((i = 1; i <= SIM_ITERATIONS; i++)); do
74+
var="SIM_ARGS_$i"
75+
args="${!var}"
76+
echo " sim run #$i args: '$args'"
77+
./verilator_obj_dir/Vuvm_pkg $args
78+
done
79+
fi
80+
81+
popd >/dev/null

‎templates/uvm-cookbook.robot‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
{{ test }}
2+
[Tags] {{ tags }}
3+
${result} = Run Process scripts/test-cookbook {{ test }} {{ verilator_root }} stdout=out/{{ suite }}/{{ test }}/stdout.log stderr=STDOUT
4+
Log ${result.stdout}
5+
Run Keyword If ${result.rc}==-15 Set Tags Timeout
6+
Should Be Equal As Integers ${result.rc} 0
7+

‎tests/uvm-cookbook/Uvm_ac_config_db/test_config.sh‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
2+
TEST_NAME="Uvm_ac_config_db/sim"
3+
4+
SRC_FILES="\
5+
+incdir+../sfr_agent \
6+
../sfr_agent/sfr_agent_pkg.sv \
7+
../sfr_agent/sfr_master_bfm.sv \
8+
../sfr_agent/sfr_monitor_bfm.sv \
9+
+incdir+../sfr_test_pkg \
10+
../sfr_test_pkg/sfr_test_pkg.sv \
11+
../tb/*.sv \
12+
../rtl/sfr_dut.sv"
13+
14+
# Test-specific flags
15+
TEST_VERILATOR_FLAGS=""
16+
SIM_ARGS="+UVM_TESTNAME=sfr_test"

‎tests/uvm-cookbook/Uvm_alu_config_analysis/test_config.sh‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
2+
TEST_NAME="Uvm_alu_config_analysis/sim"
3+
4+
SRC_FILES="\
5+
+incdir+../agent \
6+
../agent/alu_agent_pkg.sv \
7+
../agent/alu_monitor_bfm.sv \
8+
../agent/alu_driver_bfm.sv \
9+
../alu/*.sv \
10+
+incdir+../uvm_tb \
11+
../uvm_tb/alu_tb_pkg.sv \
12+
../tb/*.sv"
13+
14+
# Test-specific flags
15+
TEST_VERILATOR_FLAGS="+define+UVM_NO_DPI"
16+
SIM_ARGS="+UVM_TESTNAME=test_all_parallel"

‎tests/uvm-cookbook/Uvm_ef_vif_config_db/test_config.sh‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
2+
TEST_NAME="Uvm_ef_vif_config_db/sim"
3+
4+
SRC_FILES="\
5+
+incdir+../sfr_agent \
6+
../sfr_agent/sfr_agent_pkg.sv \
7+
../sfr_agent/sfr_master_bfm.sv \
8+
../sfr_agent/sfr_monitor_bfm.sv \
9+
+incdir+../sfr_test_pkg \
10+
../sfr_test_pkg/sfr_test_pkg.sv \
11+
../tb/*.sv \
12+
../rtl/sfr_dut.sv"
13+
14+
# Test-specific flags
15+
TEST_VERILATOR_FLAGS=""
16+
SIM_ARGS="+UVM_TESTNAME=sfr_test"

‎tests/uvm-cookbook/Uvm_messaging_example/test_config.sh‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
2+
TEST_NAME="Uvm_messaging_example"
3+
4+
SRC_FILES="\
5+
messaging_example.sv"
6+
7+
# Test-specific flags
8+
TEST_VERILATOR_FLAGS="\
9+
--error-limit 5 \
10+
+define+UVM_REPORT_DISABLE_FILE_LINE \
11+
+define+SVA_ON"
12+
13+
SIM_ARGS=""
14+

‎tests/uvm-cookbook/Uvm_param_vif_config_db/test_config.sh‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
2+
TEST_NAME="Uvm_param_vif_config_db/sim"
3+
4+
SRC_FILES="\
5+
+incdir+../sfr_agent \
6+
../sfr_agent/sfr_agent_pkg.sv \
7+
../sfr_agent/sfr_master_bfm.sv \
8+
../sfr_agent/sfr_monitor_bfm.sv \
9+
../tb/tb_params_pkg.sv \
10+
+incdir+../sfr_test_pkg \
11+
../sfr_test_pkg/sfr_test_pkg.sv \
12+
../tb/hdl_top.sv \
13+
../tb/hvl_top.sv \
14+
../rtl/sfr_dut.sv"
15+
16+
# Test-specific flags
17+
TEST_VERILATOR_FLAGS=""
18+
SIM_ARGS="+UVM_TESTNAME=sfr_test"

0 commit comments

Comments
 (0)