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1 | 1 | /* |
2 | | - * Copyright (c) 2024, WIZnet Co., Ltd. |
3 | | - * Copyright (c) 2023 Raspberry Pi (Trading) Ltd. |
4 | | - * |
5 | | - * SPDX-License-Identifier: BSD-3-Clause |
6 | | - */ |
| 2 | + Copyright (c) 2024, WIZnet Co., Ltd. |
| 3 | + Copyright (c) 2023 Raspberry Pi (Trading) Ltd. |
| 4 | +
|
| 5 | + SPDX-License-Identifier: BSD-3-Clause |
| 6 | +*/ |
7 | 7 |
|
8 | 8 | #include <stdio.h> |
9 | 9 | #include <string.h> |
@@ -76,7 +76,7 @@ static void wiznet_pio_spi_gpio_setup(wiznet_pio_spi_state_t *state) { |
76 | 76 |
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77 | 77 | wiznet_pio_spi_handle_t wiznet_pio_spi_open(const wiznet_pio_spi_config_t *wiznet_pio_spi_config) { |
78 | 78 | wiznet_pio_spi_state_t *state; |
79 | | - for(int i = 0; i < count_of(wiznet_pio_spi_state); i++) { |
| 79 | + for (int i = 0; i < count_of(wiznet_pio_spi_state); i++) { |
80 | 80 | if (!wiznet_pio_spi_state[i].funcs) { |
81 | 81 | state = &wiznet_pio_spi_state[i]; |
82 | 82 | break; |
@@ -119,11 +119,11 @@ wiznet_pio_spi_handle_t wiznet_pio_spi_open(const wiznet_pio_spi_config_t *wizne |
119 | 119 | hw_write_masked(&pads_bank0_hw->io[state->spi_config->clock_pin], |
120 | 120 | (uint)PADS_DRIVE_STRENGTH << PADS_BANK0_GPIO0_DRIVE_LSB, |
121 | 121 | PADS_BANK0_GPIO0_DRIVE_BITS |
122 | | - ); |
| 122 | + ); |
123 | 123 | hw_write_masked(&pads_bank0_hw->io[state->spi_config->clock_pin], |
124 | 124 | (uint)1 << PADS_BANK0_GPIO0_SLEWFAST_LSB, |
125 | 125 | PADS_BANK0_GPIO0_SLEWFAST_BITS |
126 | | - ); |
| 126 | + ); |
127 | 127 |
|
128 | 128 | sm_config_set_out_pins(&sm_config, state->spi_config->data_out_pin, 1); |
129 | 129 | sm_config_set_in_pins(&sm_config, state->spi_config->data_in_pin); |
@@ -158,8 +158,9 @@ void wiznet_pio_spi_close(wiznet_pio_spi_handle_t handle) { |
158 | 158 | wiznet_pio_spi_state_t *state = (wiznet_pio_spi_state_t *)handle; |
159 | 159 | if (state) { |
160 | 160 | if (state->pio_sm >= 0) { |
161 | | - if (state->pio_offset != -1) |
| 161 | + if (state->pio_offset != -1) { |
162 | 162 | pio_remove_program(state->pio, &WIZNET_PIO_SPI_PROGRAM_FUNC, state->pio_offset); |
| 163 | + } |
163 | 164 |
|
164 | 165 | pio_sm_unclaim(state->pio, state->pio_sm); |
165 | 166 | } |
@@ -220,7 +221,7 @@ bool wiznet_pio_spi_transfer(const uint8_t *tx, size_t tx_length, uint8_t *rx, s |
220 | 221 | assert(tx && tx_length && rx_length); |
221 | 222 |
|
222 | 223 | pio_sm_set_enabled(state->pio, state->pio_sm, false); // disable sm |
223 | | - pio_sm_set_wrap(state->pio, state->pio_sm, state->pio_offset + WIZNET_PIO_SPI_OFFSET_WRITE_BITS, state->pio_offset + WIZNET_PIO_SPI_OFFSET_READ_END - 1); |
| 224 | + pio_sm_set_wrap(state->pio, state->pio_sm, state->pio_offset + WIZNET_PIO_SPI_OFFSET_WRITE_BITS, state->pio_offset + WIZNET_PIO_SPI_OFFSET_READ_END - 1); |
224 | 225 | pio_sm_clear_fifos(state->pio, state->pio_sm); // clear fifos from previous run |
225 | 226 | pio_sm_set_pindirs_with_mask(state->pio, state->pio_sm, 1u << state->spi_config->data_out_pin, 1u << state->spi_config->data_out_pin); |
226 | 227 | pio_sm_restart(state->pio, state->pio_sm); |
@@ -294,7 +295,7 @@ bool wiznet_pio_spi_transfer(const uint8_t *tx, size_t tx_length, uint8_t *rx, s |
294 | 295 |
|
295 | 296 | // To read a byte we must first have been asked to write a 3 byte spi header |
296 | 297 | static uint8_t wiznet_pio_spi_read_byte(void) { |
297 | | - assert(active_state); |
| 298 | + assert(active_state); |
298 | 299 | assert(active_state->spi_header_count == WIZNET_PIO_SPI_HEADER_LEN); |
299 | 300 | uint8_t ret; |
300 | 301 | if (!wiznet_pio_spi_transfer(active_state->spi_header, active_state->spi_header_count, &ret, 1)) { |
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