Update to v2.1.1

Author: modm update bot

include/RP2040.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ * Copyright (c) 2024 Raspberry Pi Ltd.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -20,52 +20,103 @@
 #define NUM_CORES _u(2)
 #define NUM_DMA_CHANNELS _u(12)
 #define NUM_DMA_TIMERS _u(4)
+#define NUM_DMA_IRQS _u(2)
 #define NUM_IRQS _u(32)
 #define NUM_USER_IRQS _u(6)
 #define NUM_PIOS _u(2)
 #define NUM_PIO_STATE_MACHINES _u(4)
+#define NUM_PIO_IRQS _u(2)
 #define NUM_PWM_SLICES _u(8)
+#define NUM_PWM_IRQS _u(1)
 #define NUM_SPIN_LOCKS _u(32)
 #define NUM_UARTS _u(2)
 #define NUM_I2CS _u(2)
 #define NUM_SPIS _u(2)
-#define NUM_TIMERS _u(4)
+#define NUM_GENERIC_TIMERS _u(1)
+#define NUM_ALARMS _u(4)
+#define ADC_BASE_PIN _u(26)
 #define NUM_ADC_CHANNELS _u(5)
-
+#define NUM_RESETS _u(24)
 #define NUM_BANK0_GPIOS _u(30)
 #define NUM_QSPI_GPIOS _u(6)
 
 #define PIO_INSTRUCTION_COUNT _u(32)
 
-// PICO_CONFIG: XOSC_KHZ, The crystal oscillator frequency in kHz, type=int, default=12000, advanced=true, group=hardware_base
+#define USBCTRL_DPRAM_SIZE _u(4096)
+
+#define HAS_SIO_DIVIDER 1
+#define HAS_RP2040_RTC  1
+// PICO_CONFIG: XOSC_HZ, Crystal oscillator frequency in Hz, type=int, default=12000000, advanced=true, group=hardware_base
 // NOTE:  The system and USB clocks are generated from the frequency using two PLLs.
-// If you override this define, or SYS_CLK_KHZ/USB_CLK_KHZ below, you will *also* need to add your own adjusted PLL set-up defines to
+// If you override this define, or SYS_CLK_HZ/USB_CLK_HZ below, you will *also* need to add your own adjusted PLL set-up defines to
 // override the defaults which live in src/rp2_common/hardware_clocks/include/hardware/clocks.h
 // Please see the comments there about calculating the new PLL setting values.
-#ifndef XOSC_KHZ
-#define XOSC_KHZ _u(12000)
+#ifndef XOSC_HZ
+#ifdef XOSC_KHZ
+#define XOSC_HZ ((XOSC_KHZ) * _u(1000))
+#elif defined(XOSC_MHZ)
+#define XOSC_HZ ((XOSC_MHZ) * _u(1000000))
+#else
+#define XOSC_HZ _u(12000000)
+#endif
+#endif
+
+// PICO_CONFIG: PICO_USE_FASTEST_SUPPORTED_CLOCK, Use the fastest officially supported clock by default, type=bool, default=0, group=hardware_base
+#ifndef PICO_USE_FASTEST_SUPPORTED_CLOCK
+#define PICO_USE_FASTEST_SUPPORTED_CLOCK 0
+#endif
+
+// PICO_CONFIG: SYS_CLK_HZ, System operating frequency in Hz, type=int, default=125000000, advanced=true, group=hardware_base
+#ifndef SYS_CLK_HZ
+#ifdef SYS_CLK_KHZ
+#define SYS_CLK_HZ ((SYS_CLK_KHZ) * _u(1000))
+#elif defined(SYS_CLK_MHZ)
+#define SYS_CLK_HZ ((SYS_CLK_MHZ) * _u(1000000))
+#else
+#if PICO_USE_FASTEST_SUPPORTED_CLOCK
+#define SYS_CLK_HZ _u(200000000)
+#else
+#define SYS_CLK_HZ _u(125000000)
+#endif
+#endif
 #endif
 
-// PICO_CONFIG: SYS_CLK_KHZ, The system operating frequency in kHz, type=int, default=125000, advanced=true, group=hardware_base
-#ifndef SYS_CLK_KHZ
-#define SYS_CLK_KHZ _u(125000)
+// PICO_CONFIG: USB_CLK_HZ, USB clock frequency. Must be 48MHz for the USB interface to operate correctly, type=int, default=48000000, advanced=true, group=hardware_base
+#ifndef USB_CLK_HZ
+#ifdef USB_CLK_KHZ
+#define USB_CLK_HZ ((USB_CLK_KHZ) * _u(1000))
+#elif defined(USB_CLK_MHZ)
+#define USB_CLK_HZ ((USB_CLK_MHZ) * _u(1000000))
+#else
+#define USB_CLK_HZ _u(48000000)
+#endif
 #endif
 
-// PICO_CONFIG: USB_CLK_KHZ, USB clock frequency. Must be 48MHz for the USB interface to operate correctly, type=int, default=48000, advanced=true, group=hardware_base
-#ifndef USB_CLK_KHZ
-#define USB_CLK_KHZ _u(48000)
+// For backwards compatibility define XOSC_KHZ if the frequency is indeed an integer number of Khz.
+#if defined(XOSC_HZ) && !defined(XOSC_KHZ) && (XOSC_HZ % 1000 == 0)
+#define XOSC_KHZ (XOSC_HZ / 1000)
 #endif
 
 // For backwards compatibility define XOSC_MHZ if the frequency is indeed an integer number of Mhz.
 #if defined(XOSC_KHZ) && !defined(XOSC_MHZ) && (XOSC_KHZ % 1000 == 0)
 #define XOSC_MHZ (XOSC_KHZ / 1000)
 #endif
 
+// For backwards compatibility define SYS_CLK_KHZ if the frequency is indeed an integer number of Khz.
+#if defined(SYS_CLK_HZ) && !defined(SYS_CLK_KHZ) && (SYS_CLK_HZ % 1000 == 0)
+#define SYS_CLK_KHZ (SYS_CLK_HZ / 1000)
+#endif
+
 // For backwards compatibility define SYS_CLK_MHZ if the frequency is indeed an integer number of Mhz.
 #if defined(SYS_CLK_KHZ) && !defined(SYS_CLK_MHZ) && (SYS_CLK_KHZ % 1000 == 0)
 #define SYS_CLK_MHZ (SYS_CLK_KHZ / 1000)
 #endif
 
+// For backwards compatibility define USB_CLK_KHZ if the frequency is indeed an integer number of Khz.
+#if defined(USB_CLK_HZ) && !defined(USB_CLK_KHZ) && (USB_CLK_HZ % 1000 == 0)
+#define USB_CLK_KHZ (USB_CLK_HZ / 1000)
+#endif
+
 // For backwards compatibility define USB_CLK_MHZ if the frequency is indeed an integer number of Mhz.
 #if defined(USB_CLK_KHZ) && !defined(USB_CLK_MHZ) && (USB_CLK_KHZ % 1000 == 0)
 #define USB_CLK_MHZ (USB_CLK_KHZ / 1000)
@@ -74,5 +125,6 @@
 #define FIRST_USER_IRQ (NUM_IRQS - NUM_USER_IRQS)
 #define VTABLE_FIRST_IRQ 16
 
-#endif
+#define REG_FIELD_WIDTH(f) (f ## _MSB + 1 - f ## _LSB)
 
+#endif

include/hardware/platform_defs.h

@@ -1,5 +1,7 @@
+// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
+
 /**
- * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
+ * Copyright (c) 2024 Raspberry Pi Ltd.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -9,8 +11,8 @@
 // Bus type       : apb
 // Description    : Control and data interface to SAR ADC
 // =============================================================================
-#ifndef HARDWARE_REGS_ADC_DEFINED
-#define HARDWARE_REGS_ADC_DEFINED
+#ifndef _HARDWARE_REGS_ADC_H
+#define _HARDWARE_REGS_ADC_H
 // =============================================================================
 // Register    : ADC_CS
 // Description : ADC Control and Status
@@ -25,8 +27,8 @@
 //               round-robin fashion.
 //               The first channel to be sampled will be the one currently
 //               indicated by AINSEL.
-//               AINSEL will be updated after each conversion with the
-//               newly-selected channel.
+//               AINSEL will be updated after each conversion with the newly-
+//               selected channel.
 #define ADC_CS_RROBIN_RESET  _u(0x00)
 #define ADC_CS_RROBIN_BITS   _u(0x001f0000)
 #define ADC_CS_RROBIN_MSB    _u(20)
@@ -153,15 +155,13 @@
 #define ADC_FCS_UNDER_ACCESS "WC"
 // -----------------------------------------------------------------------------
 // Field       : ADC_FCS_FULL
-// Description : None
 #define ADC_FCS_FULL_RESET  _u(0x0)
 #define ADC_FCS_FULL_BITS   _u(0x00000200)
 #define ADC_FCS_FULL_MSB    _u(9)
 #define ADC_FCS_FULL_LSB    _u(9)
 #define ADC_FCS_FULL_ACCESS "RO"
 // -----------------------------------------------------------------------------
 // Field       : ADC_FCS_EMPTY
-// Description : None
 #define ADC_FCS_EMPTY_RESET  _u(0x0)
 #define ADC_FCS_EMPTY_BITS   _u(0x00000100)
 #define ADC_FCS_EMPTY_MSB    _u(8)
@@ -218,7 +218,6 @@
 #define ADC_FIFO_ERR_ACCESS "RF"
 // -----------------------------------------------------------------------------
 // Field       : ADC_FIFO_VAL
-// Description : None
 #define ADC_FIFO_VAL_RESET  "-"
 #define ADC_FIFO_VAL_BITS   _u(0x00000fff)
 #define ADC_FIFO_VAL_MSB    _u(11)
@@ -311,4 +310,5 @@
 #define ADC_INTS_FIFO_LSB    _u(0)
 #define ADC_INTS_FIFO_ACCESS "RO"
 // =============================================================================
-#endif // HARDWARE_REGS_ADC_DEFINED
+#endif // _HARDWARE_REGS_ADC_H
+

include/hardware/regs/adc.h

@@ -1,18 +1,24 @@
+// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
+
 /**
- * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
+ * Copyright (c) 2024 Raspberry Pi Ltd.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
-#ifndef _ADDRESSMAP_H_
-#define _ADDRESSMAP_H_
+#ifndef _ADDRESSMAP_H
+#define _ADDRESSMAP_H
+
+/**
+ * \file rp2040/addressmap.h
+ */
 
 #include "hardware/platform_defs.h"
 
 // Register address offsets for atomic RMW aliases
-#define REG_ALIAS_RW_BITS  (0x0u << 12u)
-#define REG_ALIAS_XOR_BITS (0x1u << 12u)
-#define REG_ALIAS_SET_BITS (0x2u << 12u)
-#define REG_ALIAS_CLR_BITS (0x3u << 12u)
+#define REG_ALIAS_RW_BITS  (_u(0x0) << _u(12))
+#define REG_ALIAS_XOR_BITS (_u(0x1) << _u(12))
+#define REG_ALIAS_SET_BITS (_u(0x2) << _u(12))
+#define REG_ALIAS_CLR_BITS (_u(0x3) << _u(12))
 
 #define ROM_BASE _u(0x00000000)
 #define XIP_BASE _u(0x10000000)
@@ -71,4 +77,5 @@
 #define SIO_BASE _u(0xd0000000)
 #define PPB_BASE _u(0xe0000000)
 
-#endif // _ADDRESSMAP_H_
+#endif // _ADDRESSMAP_H
+