I found 1 failed test about the cover of all S1/S2 enums for VU0 macro mappings #101
Description
Today, i just runned the ps2x_tests.exe and i did a test to make sure that if features are all passed. Now, I just found 1 failed test about the VU0 macro mappings covering all the S1/S2 enums. Here's the log of the today's test:
[Run]: COP0 MFC0/MTC0 translate to COP0 register access [Passed]
[Run]: FCR access uses CFC1/CTC1 [Passed]
[Run]: JAL to internal target becomes goto [Passed]
[Run]: JAL to known function emits call and check [Passed]
[Run]: JALR emits indirect call [Passed]
[Run]: JALR fallback should not expose epilogue tail-jump labels [Passed]
[Run]: JALR includes switch and fallback/guard pair [Passed]
[Run]: JR $31 emits switch for internal return targets [Passed]
[Run]: JR non-RA emits switch for in-function jump targets [Passed]
[Run]: PCPYLD and PEXEW use runtime helper macros [Passed]
[Run]: QFSRV translation uses runtime helper macro [Passed]
[Run]: R5900 MMI MULT1 writes rd when rd is non-zero [Passed]
[Run]: R5900 MULT writes rd when rd is non-zero [Passed]
[Run]: SC requires matching LL reservation address [Passed]
[Run]: VU CReg access uses CFC2/CTC2 [Passed]
[Run]: VU random helpers emit line comments on separate lines [Passed]
[Run]: VU0 S1 q/i forms keep mask and use sa as destination [Passed]
[Run]: VU0 S1 uses fd/fs/ft fields (sa/rd/rt) [Passed]
[Run]: VU0 S2 VI memory ops use rd as VI base register [Passed]
[Run]: VU0 S2 vector ops use rd as source and rt as destination [Passed]
[Run]: VU0 macro mappings cover all S1/S2 enums [Failed]
- instructions.h should be readable from the test working directory
- VU0_S1 enum list should not be empty
- VU0_S2 enum list should not be empty
[Run]: backward BEQ emits label and goto (sign-extended offset) [Passed]
[Run]: branch-likely places delay slot only in taken path [Passed]
[Run]: branches outside function still set pc [Passed]
[Run]: configured jump table addresses drive JR dispatch targets [Passed]
[Run]: emits labels and gotos for internal branches [Passed]
[Run]: jump to unknown target sets pc [Passed]
[Run]: jumps to known symbols call by name [Passed]
[Run]: labels delay slot when it is a branch target [Passed]
[Run]: renamed function used in jump table [Passed]
[Run]: reserved identifiers are sanitized and used in calls [Passed]
[Run]: resolveStubTarget allows leading underscore alias [Passed]
[Run]: scalar logical immediates emit low64 operations [Passed]
[Run]: scalar logical register ops emit low64 operations [Passed]
[Run]: trailing JAL without decoded delay slot still emits call flow [Passed]
[Run]: trailing JR $31 without decoded delay slot still emits return flow [Passed]
[Run]: entry-point mapping handles exact inside and fallback [Passed]
[Run]: jump-table detection finds canonical sltiu/bne/lw/jr pattern [Passed]
[Run]: library-symbol classification table [Passed]
[Run]: patch-density threshold behavior [Passed]
[Run]: reliable-symbol heuristic filters autogenerated names [Passed]
[Run]: signal-based skip heuristics keep reliable names and skip unreliable/system [Passed]
[Run]: system skip keeps forced entry names recompiled [Passed]
[Run]: system-symbol heuristic is strict to system patterns [Passed]
[Run]: GIF IMAGE packet writes host-to-local data into GS VRAM [Passed]
[Run]: GIF PACKED A+D writes DISPFB1 and DISPLAY1 privileged registers [Passed]
[Run]: GIF REGLIST NREG=0 is treated as sixteen descriptors [Passed]
[Run]: GIF REGLIST with odd register count consumes 128-bit padding before next tag [Passed]
[Run]: GS CSR/IMR support coherent 64-bit and 32-bit access [Passed]
[Run]: GS CT24 host-local-host transfer preserves 24-bit RGB payload [Passed]
[Run]: GS PSMT4 host-local-host keeps nibble packing stable [Passed]
[Run]: GS SIGNAL and FINISH set CSR bits that clear by CSR write-one acknowledge [Passed]
[Run]: GS local-to-host transfer supports partial incremental reads [Passed]
[Run]: GS writeIORegister increments GS write counter [Passed]
[Run]: GsPutIMR and GsGetIMR roundtrip old and new values PS2 GsPutIMR: Setting IMR=0x3333444411112222
PS2 GsGetIMR: Returning IMR=0x3333444411112222
[Passed]
[Run]: unknown GS privileged offsets are no-op and read as zero [Passed]
[Run]: DMAC D_CTRL DMAE gates GIF DMA start [Passed]
[Run]: DMAC D_STAT toggles masks and clears channel status on write-one [Passed]
[Run]: GIF DMA can source from scratchpad [Passed]
[Run]: GIF DMA chain CALL sources payload from TADR+16 [Passed]
[Run]: GIF DMA chain IRQ stops only when TIE is set [Passed]
[Run]: GIF DMA chain RET transfers payload and resumes after CALL [Passed]
[Run]: GIF DMA mode0 copies RDRAM packet and clears channel [Passed]
[Run]: GIF arbiter prioritizes PATH1 then PATH2 then PATH3 [Passed]
[Run]: PATH3 mask queues packets until unmask [Passed]
[Run]: VIF DIRECTHL stalls behind queued PATH3 IMAGE packets [Passed]
[Run]: VIF FBRST RST clears VIF1 command state [Passed]
[Run]: VIF MPG num zero uploads 256 instructions [Passed]
[Run]: VIF MSCAL callback can execute XGKICK and update GS VRAM [Passed]
[Run]: VIF MSKPATH3 uses immediate bit15 [Passed]
[Run]: VIF STCYCL skip mode advances destination by CL when CL>=WL [Passed]
[Run]: VIF STMOD offset and difference modes apply to UNPACK data [Passed]
[Run]: VIF UNPACK V4-16 sign and zero extension follow immediate bit14 [Passed]
[Run]: VIF UNPACK bit15 adds TOPS to destination address [Passed]
[Run]: VIF UNPACK num zero uploads 256 vectors [Passed]
[Run]: VIF control commands update MARK MASK ROW and COL registers [Passed]
[Run]: VIF double-buffer OFFSET BASE and MSCAL update TOPS and ITOPS [Passed]
[Run]: VIF fill write uses STMASK and STROW when WL>CL [Passed]
[Run]: VIF irq command sets STAT.INT and CODE until FBRST.STC clears it [Passed]
[Run]: VIF masked UNPACK uses data row col and protect selectors [Passed]
[Run]: VIF1 DMA DIRECT forwards payload to GIF callback and clears channel [Passed]
[Run]: VIF1 DMA DIRECT image packet reaches GS through arbiter [Passed]
[Run]: VU1 XGKICK wraps packet payload across VU1 memory boundary [Passed]
[Run]: fast memory helpers wrap safely at RAM boundary [Passed]
[Run]: translateAddress handles kseg and uncached aliases [Passed]
[Run]: unaligned accesses throw [Passed]
[Run]: uncached aliases map to same RDRAM bytes [Passed]
[Run]: additional entries split at nearest discovered boundary [Passed]
[Run]: config manager parses jump_tables table entries Parsing toml file: C:\Users\tsoka\AppData\Local\Temp\ps2recomp-jump-table-10439919950100.toml
[Passed]
[Run]: elf parser ignores STT_FUNC symbols in non-executable sections [Passed]
[Run]: entry reslice handles entries without containing function [Passed]
[Run]: entry reslice trims earlier entries after late discovery [Passed]
[Run]: entry starting at jr ra is capped to return thunk [Passed]
[Run]: ghidra map replaces JAL fallback-only auto starts Loaded 1 functions from Ghidra map
[Passed]
[Run]: non-executable section targets are ignored [Passed]
[Run]: respect max length for .cpp filenames [Passed]
[Run]: same-function JAL targets get entry wrappers but J targets stay labels [Passed]
[Run]: GS alpha blend uses ALPHA register FIX factor [Passed]
[Run]: GS sprite draw applies XYOFFSET and fully-outside scissor should not render [Passed]
[Run]: Semaphore poll/signal remains stable under host-thread contention [CreateSema] id=1 init=1 max=1
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=0->1 ret=0
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[SignalSema] tid=1 sid=1 count=1->1 ret=-420
[Passed]
[Run]: SignalException marks EPC and BD for delay-slot exceptions [Passed]
[Run]: SignalException uses current pc without BD and honors BEV vector [Passed]
[Run]: VIF MSCAL and MSCNT toggle DBF and keep TOPS/ITOPS coherent [Passed]
[Run]: WaitEventFlag AND-mode is stable under concurrent setters [WaitEventFlag:block] tid=1 eid=1 waitBits=0x3 mode=0x0 bits=0x0 pc=0x0 ra=0x0
[SetEventFlag] tid=1 eid=[SetEventFlag] tid=1 eid=1 bits=0x2 newBits=0x3
1 bits=0x1 newBits=0x1
[WaitEventFlag:wake] tid=1 eid=1 ret=0 bits=0x3
[Passed]
[Run]: differential decoder/codegen gpr-write contract for MULT and DIV families [Passed]
[Run]: handleSyscall rejects invocation in delay slot [Passed]
[Run]: multiply-add matrix writes rd only when R5900 requires it [Passed]
[Run]: notifyRuntimeStop joins guest worker threads before teardown [CreateThread] id=2 entry=0x250000 stack=0x100000 size=0x400 gp=0x110000 prio=8
[StartThread] id=2 entry=0x250000 sp=0x100400 gp=0x110000 arg=0x0
[StartThread] id=2 returned (pc=0x250000)
[Passed]
[Run]: mc0 directory creation fioMkdir: Created directory 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440073224400\mcroot\SAVEDATA'
[Passed]
[Run]: mc0 file read operations fioMkdir: Created directory 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440082255900\mcroot\SAVEDATA'
fioOpen: 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440082255900\mcroot\SAVEDATA\test.txt' flags=0x602 mode='w+b'
fioOpen: 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440082255900\mcroot\SAVEDATA\test.txt' flags=0x1 mode='r+b'
[Passed]
[Run]: mc0 file write operations fioMkdir: Created directory 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440104786700\mcroot\SAVEDATA'
fioOpen: 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440104786700\mcroot\SAVEDATA\test.txt' flags=0x602 mode='w+b'
[Passed]
[Run]: mc0 paths isolated from cdRoot fioMkdir: Created directory 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440129380500\mcroot\ISOLATED'
fioOpen: 'C:\Users\tsoka\AppData\Local\Temp\ps2recomp-mc0-10440129380500\mcroot\ISOLATED\test.txt' flags=0x602 mode='w+b'
[Passed]
[Run]: sceIoctl cmd1 updates wait flag state [Passed]
[Run]: INTC VBLANK handlers respect EnableIntc and DisableIntc masks [Passed]
[Run]: PollEventFlag WEF_CLEAR clears only matched bits [Passed]
[Run]: SetVSyncFlag updates guest flag and monotonic tick [Passed]
[Run]: WaitEventFlag blocks and wakes when SetEventFlag publishes bits [WaitEventFlag:block] tid=1 eid=1 waitBits=0x4 mode=0x1 bits=0x0 pc=0x0 ra=0x0
[SetEventFlag] tid=1 eid=1 bits=0x4 newBits=0x4
[WaitEventFlag:wake] tid=1 eid=1 ret=0 bits=0x4
[Passed]
[Run]: WaitVSyncTick returns when runtime stop is requested [Passed]
[Run]: SetSyscall honors signed kernel-table offsets [Passed]
[Run]: SetSyscall mirrors guest kernel table entries into low memory [Syscall83:override] handler=0x383548 invoked=false pc=0x0 ra=0x0 a0=0x80000000 a1=0x80080000 a2=0x383548 a3=0x0 guestRet=0x0 builtinRet=0x8001218c guest-20c=0x0 builtin-20c=0x80011f80 guest-168=0x0 builtin-168=0x80012024 match=false
[SyscallOverride:fallback] syscall=0x83 handler=0x383548 pc=0x0 ra=0x0
[FindAddress:hit] pc=0x0 start=0x80000000 end=0x80080000 alignedStart=0x80000000 alignedEnd=0x80080000 target=0x383548 targetNorm=0x383548 result=0x8001218c scannedWords=131072 allZero=false aborted=false
firstWords: [0x80000000]=0x0 [0x80000004]=0x0 [0x80000008]=0x0 [0x8000000c]=0x0 [0x80000010]=0x0 [0x80000014]=0x0 [0x80000018]=0x0 [0x8000001c]=0x0
nonZeroSample: [0x800002f0]=0x8001 [0x800002f8]=0x1f80 [0x8001218c]=0x383548
matches: [0x8001218c]=0x383548(exact)
[Passed]
[Run]: SetSyscall override dispatches guest handlers that return through the sentinel [Passed]
[Run]: SetSyscall override preserves KSEG argument sign extension [Passed]
[Run]: SetSyscall override preserves upper 64 bits when writing 32-bit args [Passed]
[Run]: broken syscall overrides fall back to builtin handlers [SyscallOverride:invoke-failed] func=0x200010 exitPc=0x12345678 ra=0xfff000 steps=1 reason=missing-function
[Syscall83:override] handler=0x200010 invoked=false pc=0x0 ra=0x0 a0=0x2000 a1=0x200c a2=0x11223344 a3=0x0 guestRet=0xdeadbeef builtinRet=0x2004 guest-20c=0xdeadbce3 builtin-20c=0x1df8 guest-168=0xdeadbd87 builtin-168=0x1e9c match=false
[SyscallOverride:fallback] syscall=0x83 handler=0x200010 pc=0x0 ra=0x0
[FindAddress:hit] pc=0x0 start=0x2000 end=0x200c alignedStart=0x2000 alignedEnd=0x200c target=0x11223344 targetNorm=0x11223344 result=0x2004 scannedWords=3 allZero=false aborted=false
firstWords: [0x2000]=0x11111111 [0x2004]=0x11223344 [0x2008]=0x55555555
nonZeroSample: [0x2000]=0x11111111 [0x2004]=0x11223344 [0x2008]=0x55555555
matches: [0x2004]=0x11223344(exact)
[Passed]
[Run]: guest kernel syscall mirror resets between runs [Passed]
[Run]: numeric syscall 0x83 finds matching table entry [FindAddress:hit] pc=0x0 start=0x2000 end=0x2010 alignedStart=0x2000 alignedEnd=0x2010 target=0x11223344 targetNorm=0x11223344 result=0x2004 scannedWords=4 allZero=false aborted=false
firstWords: [0x2000]=0x11111111 [0x2004]=0x11223344 [0x2008]=0x55555555 [0x200c]=0x89abcdef
nonZeroSample: [0x2000]=0x11111111 [0x2004]=0x11223344 [0x2008]=0x55555555 [0x200c]=0x89abcdef
matches: [0x2004]=0x11223344(exact)
[Passed]
[Run]: numeric syscall 0x83 returns 0 when entry is absent [FindAddress:miss] pc=0x0 start=0x4000 end=0x400c alignedStart=0x4000 alignedEnd=0x400c target=0xdeadbeef targetNorm=0xdeadbeef result=0x0 scannedWords=3 allZero=false aborted=false
firstWords: [0x4000]=0x1 [0x4004]=0x2 [0x4008]=0x3
nonZeroSample: [0x4000]=0x1 [0x4004]=0x2 [0x4008]=0x3
matches: none
[Passed]
[Run]: numeric syscall 0x83 supports KSEG aliases [FindAddress:hit] pc=0x0 start=0x80003000 end=0x80003008 alignedStart=0x80003000 alignedEnd=0x80003008 target=0x80123456 targetNorm=0x123456 result=0x80003000 scannedWords=2 allZero=false aborted=false
firstWords: [0x80003000]=0x123456 [0x80003004]=0x8000aaaa
nonZeroSample: [0x80003000]=0x123456 [0x80003004]=0x8000aaaa
matches: [0x80003000]=0x123456(alias)
[Passed]
[Run]: reentrant syscall overrides fall back to builtin handlers [SyscallOverride:reentrant] syscall=0x83 handler=0x200020 pc=0x200020 ra=0xfff000
[FindAddress:hit] pc=0x200020 start=0x3000 end=0x300c alignedStart=0x3000 alignedEnd=0x300c target=0x11223344 targetNorm=0x11223344 result=0x3004 scannedWords=3 allZero=false aborted=false
firstWords: [0x3000]=0xcafebabe [0x3004]=0x11223344 [0x3008]=0x55667788
nonZeroSample: [0x3000]=0xcafebabe [0x3004]=0x11223344 [0x3008]=0x55667788
matches: [0x3004]=0x11223344(exact)
[Syscall83:override] handler=0x200020 invoked=true pc=0x0 ra=0x0 a0=0x3000 a1=0x300c a2=0x11223344 a3=0x0 guestRet=0x3004 builtinRet=0x3004 guest-20c=0x2df8 builtin-20c=0x2df8 guest-168=0x2e9c builtin-168=0x2e9c match=true
[Passed]
[Run]: semaphore EE layout covers poll, signal overflow, and status [CreateSema] id=1 init=1 max=2
[SignalSema] tid=1 sid=1 count=0->1 ret=0
[SignalSema] tid=1 sid=1 count=1->2 ret=0
[SignalSema] tid=1 sid=1 count=2->2 ret=-420
[Passed]
[Run]: semaphore legacy layout decode remains supported [CreateSema] id=1 init=3 max=4
[Passed]
[Run]: setup heap and allocator primitives track end-of-heap [Passed]
[Run]: setup heap and thread invalid ids use documented kernel errors CreateThread error: null ThreadParam pointer
StartThread error: unknown thread id 32767
[Passed]
[Run]: start thread validates target and entry registration [CreateThread] id=2 entry=0x250000 stack=0x300000 size=0x400 gp=0x110000 prio=8
[StartThread] entry 0x250000 is not registered
[Passed]
[Run]: thread create/refer/delete follows EE status layout [CreateThread] id=2 entry=0x200000 stack=0x300000 size=0x800 gp=0x120000 prio=5
[Passed]
[Run]: thread id and wakeup guard rails match kernel-style errors [Passed]
[Run]: resetSifState seeds boot-ready SIF registers [sceSifGetReg] reg=0x4 value=0x20000 pc=0x0 ra=0x0
[sceSifGetReg] reg=0x80000000 value=0x0 pc=0x0 ra=0x0
[sceSifGetReg] reg=0x80000001 value=0x0 pc=0x0 ra=0x0
[sceSifGetReg] reg=0x80000002 value=0x0 pc=0x0 ra=0x0
[Passed]
[Run]: sceSifExitCmd restores default boot-ready SIF registers [sceSifSetReg] reg=0x4 prev=0x20000 value=0x12340000 pc=0x0 ra=0x0
[sceSifSetReg] reg=0x80000002 prev=0x0 value=0x89abcdef pc=0x0 ra=0x0
[sceSifGetReg] reg=0x4 value=0x20000 pc=0x0 ra=0x0
[sceSifGetReg] reg=0x80000002 value=0x0 pc=0x0 ra=0x0
[Passed]
[Run]: sceSifGetOtherData copies payload and writes receive metadata [Passed]
[Run]: sceSifGetOtherData rejects unsupported guest segments sceSifGetOtherData copy failed src=0xe0000200 dst=0x24100 size=0x10
[Passed]
[Run]: sceSifSetDma copies payload and sceSifDmaStat reports complete [Passed]
[Run]: sceSifSetDma dispatches enabled DMAC handlers for cause 5 [Passed]
[Run]: sceSifSetDma enforces descriptor count limit [Passed]
[Run]: sceSifSetDma rejects invalid descriptors without partial writes sceSifSetDma failed dmat=0x21000 count=0x2
[Passed]
[Run]: SifCallRpc falls back to stack ABI when register pack is implausible [SifInitRpc] Initialized
[SifRegisterRpc] sid=0x20000133 sd=0x2a100
[SifCallRpc] client=0x2a200 sid=0x20000133 rpcNum=0x99 mode=0x0 sendBuf=0x2a400 recvBuf=0x2a500 recvSize=0xc size=12
[Passed]
[Run]: SifCallRpc prefers stack ABI for DTX URPC when both packs look plausible [SifCallRpc:ABI] client=0x2b000 rpc=0x422 sidHint=0x7d000000 useReg=0 reg=(4,2b300,c,0,0) stk=(c,2b200,4,0,0) plausible=(1,1) force34=1
[SifCallRpc:DTX] rpcNum=0x422 cmd=0x22 fn=0x0 obj=0x0 send0=0x1 recv0=0x1f18000 resultPtr=0x2b200 handled=1 dispatch=0 emu=1 emu34=1
[SifCallRpc] client=0x2b000 sid=0x7d000000 rpcNum=0x422 mode=0x0 sendBuf=0x2b100 recvBuf=0x2b200 recvSize=0x4 size=12
[Passed]
[Run]: SifSetRpcQueue remove roundtrip is stable [Passed]
[Run]: bind before register creates placeholder then remaps [SifRegisterRpc] sid=0x20000122 sd=0x24100
[Passed]
[Run]: register bind call updates descriptors and payload [SifRegisterRpc] sid=0x20000111 sd=0x22100
[SifCallRpc] client=0x22200 sid=0x20000111 rpcNum=0x55 mode=0x0 sendBuf=0x22500 recvBuf=0x22600 recvSize=0x10 size=16
[Passed]
[Run]: sid1 nowait RPC 0x12/0x13 returns expected pointers and signals sema [CreateSema] id=1 init=0 max=1
[SifCallRpc] client=0x28000 sid=0x1 rpcNum=0x12 mode=0x1 sendBuf=0x0 recvBuf=0x28200 recvSize=0x10 size=0
[SifCallRpc] client=0x28000 sid=0x1 rpcNum=0x13 mode=0x1 sendBuf=0x0 recvBuf=0x28200 recvSize=0x10 size=0
[Passed]
[Run]: basic pad init/port/state functions return expected values [Passed]
[Run]: pad info and mode helpers return consistent values [Passed]
[Run]: pad setters return success [Passed]
[Run]: pad string helpers map state codes [Passed]
[Run]: scePadGetButtonMask returns all buttons [Passed]
[Run]: scePadGetFrameCount increments [Passed]
[Run]: scePadRead button bits are active-low [Passed]
[Run]: scePadRead uses override state [Passed]
[Run]: scePadStateIntToStr and scePadReqIntToStr write strings [Passed]
[Run]: COP0 ERET is marked as return without delay slot [Passed]
[Run]: COP2 VU macro op marks VU flags [Passed]
[Run]: J computes target with upper PC bits [Passed]
[Run]: JALR marks call and writes rd when non-zero [Passed]
[Run]: JR is marked as return when rs is $ra [Passed]
[Run]: JR/JALR jump target is zero (dynamic) [Passed]
[Run]: LL/SC modify control and set load/store flags [Passed]
[Run]: MMI instruction sets MMI flags [Passed]
[Run]: R5900 MMI MULT1 marks rd modification when rd is non-zero [Passed]
[Run]: R5900 MULT marks rd modification when rd is non-zero [Passed]
[Run]: REGIMM branch and link marks call and GPR modification [Passed]
[Run]: branch target sign-extends negative offset [Passed]
[Run]: decodes BEQ sets branch flags and target [Passed]
[Run]: decodes JAL with jump target and call flag [Passed]
[Run]: decodes load/store flags [Passed]