Prevent usage of the same `coreid` on the same debug module.

[MarekVCodasip]

Recently, Tomas Vanek found a bug when investigating a different issue (https://review.openocd.org/c/openocd/+/9126) that when -codeid is not specified for a core, multicore targets will each have the same one on one debug module, leading to errors.

This should be fixed.

This config can be used to recreate it:

target create c0 riscv -chain-position riscv.cpu -rtos hwthread
target create c1 riscv -chain-position riscv.cpu -rtos hwthread
target smp c0 c1

[tom-van]

Thanks for raising the issue!

[en-sc]

I'd suggest deprecating the use of coreid for RISC-V and introducing hartid.

Please see:

• OpenOCD assumes hartid and hart index are the same #278, and this comment in particular -- I believe it describes the problem quite well (after all I am the one who wrote it :) ).
• Drop the use of -coreid in RISC-V targets #1147