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GPIO Pull Request corrections
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2 files changed

+88
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‎e310x-hal/src/gpio.rs‎

Lines changed: 77 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,26 @@ pub enum EventType {
1515
Rise,
1616
/// Falling edge event
1717
Fall,
18+
/// Both levels event
19+
///
20+
/// # Note
21+
///
22+
/// In the methods that check if an interrupt is enabled or pending,
23+
/// this event type works like an **any** operator between `High` and `Low` events.
24+
BothLevels,
1825
/// Both edges event
26+
///
27+
/// # Note
28+
///
29+
/// In the methods that check if an interrupt is enabled or pending,
30+
/// this event type works like an **any** operator between `Rise` and `Fall` events.
1931
BothEdges,
2032
/// All events
33+
///
34+
/// # Note
35+
///
36+
/// In the methods that check if an interrupt is enabled or pending,
37+
/// this event type works like an **any** operator between all event types.
2138
All,
2239
}
2340

@@ -34,9 +51,9 @@ pub trait GpioExt {
3451
/// # Note
3552
///
3653
/// This function does not enable the interrupts in the PLIC, it only sets the
37-
/// interrupt enable bit in the GPIO peripheral. You must call
38-
/// [`enable_exti()`](super::gpio::gpio0::Pin0::enable_exti) on the pin to enable its interrupt in
39-
/// the PLIC.
54+
/// interrupt enable bits in the GPIO peripheral. You must call the
55+
/// [`enable_exti()`](super::gpio::gpio0::Pin0::enable_exti) method of every pin
56+
/// to enable their interrupt in the PLIC.
4057
fn enable_interrupts(event: EventType);
4158

4259
/// Disables the specified interrupt event for all the GPIO pins.
@@ -222,6 +239,12 @@ macro_rules! gpio {
222239
EventType::Low => {
223240
unsafe{ p.low_ie().write(|w| w.bits(0xFFFFFFFF)) };
224241
}
242+
EventType::BothLevels => {
243+
unsafe {
244+
p.high_ie().write(|w| w.bits(0xFFFFFFFF));
245+
p.low_ie().write(|w| w.bits(0xFFFFFFFF));
246+
}
247+
}
225248
EventType::Rise => {
226249
unsafe{ p.rise_ie().write(|w| w.bits(0xFFFFFFFF)) };
227250
}
@@ -255,6 +278,12 @@ macro_rules! gpio {
255278
EventType::Low => {
256279
unsafe { p.low_ie().write(|w| w.bits(0x00000000)); }
257280
}
281+
EventType::BothLevels => {
282+
unsafe {
283+
p.high_ie().write(|w| w.bits(0x00000000));
284+
p.low_ie().write(|w| w.bits(0x00000000));
285+
}
286+
}
258287
EventType::Rise => {
259288
unsafe { p.rise_ie().write(|w| w.bits(0x00000000)); }
260289
}
@@ -288,6 +317,12 @@ macro_rules! gpio {
288317
EventType::Low => {
289318
unsafe { p.low_ip().write(|w| w.bits(0xFFFFFFFF)); }
290319
}
320+
EventType::BothLevels => {
321+
unsafe {
322+
p.high_ip().write(|w| w.bits(0xFFFFFFFF));
323+
p.low_ip().write(|w| w.bits(0xFFFFFFFF));
324+
}
325+
}
291326
EventType::Rise => {
292327
unsafe { p.rise_ip().write(|w| w.bits(0xFFFFFFFF)); }
293328
}
@@ -415,8 +450,8 @@ macro_rules! gpio {
415450
/// # Note
416451
///
417452
/// This function enables the external interrupt source in the PLIC,
418-
/// but does not enable the PLIC peripheral itself. To enable the plic peripheral
419-
/// you must call [`Plic::enable()`](riscv-peripheral::plic::enables::ENABLES::enable).
453+
/// but does not enable the PLIC peripheral itself. For more details,
454+
/// refer to the [`e310x::Plic`] documentation.
420455
///
421456
/// # Safety
422457
///
@@ -432,7 +467,7 @@ macro_rules! gpio {
432467
ctx.enables().disable(ExternalInterrupt::$handle);
433468
}
434469

435-
/// Returns if the external interrupt source for the pin is enabled.
470+
/// Returns whether the external interrupt source for the pin is enabled.
436471
pub fn is_exti_enabled(&self, plic: &Plic) -> bool {
437472
let ctx = plic.ctx0();
438473
ctx.enables().is_enabled(ExternalInterrupt::$handle)
@@ -473,6 +508,12 @@ macro_rules! gpio {
473508
EventType::Low => {
474509
unsafe { gpio_block.low_ie().modify(|r, w| w.bits(r.bits() | pin_mask)); }
475510
}
511+
EventType::BothLevels => {
512+
unsafe {
513+
gpio_block.high_ie().modify(|r, w| w.bits(r.bits() | pin_mask));
514+
gpio_block.low_ie().modify(|r, w| w.bits(r.bits() | pin_mask));
515+
}
516+
}
476517
EventType::Rise => {
477518
unsafe { gpio_block.rise_ie().modify(|r, w| w.bits(r.bits() | pin_mask)); }
478519
}
@@ -508,6 +549,12 @@ macro_rules! gpio {
508549
EventType::Low => {
509550
unsafe { gpio_block.low_ie().modify(|r, w| w.bits(r.bits() & !pin_mask)); }
510551
}
552+
EventType::BothLevels => {
553+
unsafe {
554+
gpio_block.high_ie().modify(|r, w| w.bits(r.bits() & !pin_mask));
555+
gpio_block.low_ie().modify(|r, w| w.bits(r.bits() & !pin_mask));
556+
}
557+
}
511558
EventType::Rise => {
512559
unsafe { gpio_block.rise_ie().modify(|r, w| w.bits(r.bits() & !pin_mask)); }
513560
}
@@ -543,6 +590,12 @@ macro_rules! gpio {
543590
EventType::Low => {
544591
unsafe { gpio_block.low_ip().write(|w| w.bits(pin_mask)); }
545592
}
593+
EventType::BothLevels => {
594+
unsafe {
595+
gpio_block.high_ip().write(|w| w.bits(pin_mask));
596+
gpio_block.low_ip().write(|w| w.bits(pin_mask));
597+
}
598+
}
546599
EventType::Rise => {
547600
unsafe { gpio_block.rise_ip().write(|w| w.bits(pin_mask)); }
548601
}
@@ -570,9 +623,11 @@ macro_rules! gpio {
570623
///
571624
/// # Note
572625
///
573-
/// Both Edges will return true if either the
574-
/// rising or falling edge interrupts are enabled
575-
/// and All will return true if any of the
626+
/// [EventType::BothEdges] will return true if either the
627+
/// rising or falling edge interrupts are enabled,
628+
/// [EventType::BothLevels] will return true if either the
629+
/// high or low level interrupts are enabled
630+
/// and [EventType::All] will return true if any of the
576631
/// interrupts are enabled.
577632
pub fn is_interrupt_enabled(&self, event: EventType) -> bool {
578633
let gpio_block = $GPIOX::peripheral();
@@ -581,6 +636,10 @@ macro_rules! gpio {
581636
match event {
582637
EventType::High => gpio_block.high_ie().read().bits() & pin_mask != 0,
583638
EventType::Low => gpio_block.low_ie().read().bits() & pin_mask != 0,
639+
EventType::BothLevels => {
640+
(gpio_block.high_ie().read().bits() & pin_mask != 0) ||
641+
(gpio_block.low_ie().read().bits() & pin_mask != 0)
642+
}
584643
EventType::Rise => gpio_block.rise_ie().read().bits() & pin_mask != 0,
585644
EventType::Fall => gpio_block.fall_ie().read().bits() & pin_mask != 0,
586645
EventType::BothEdges => {
@@ -600,9 +659,11 @@ macro_rules! gpio {
600659
///
601660
/// # Note
602661
///
603-
/// Both Edges will return true if either the
604-
/// rising or falling edge interrupts are pending
605-
/// and All will return true if any of the
662+
/// [EventType::BothEdges] will return true if either the
663+
/// rising or falling edge interrupts are pending,
664+
/// [EventType::BothLevels] will return true if either the
665+
/// high or low level interrupts are pending
666+
/// and [EventType::All] will return true if any of the
606667
/// interrupts are pending.
607668
pub fn is_interrupt_pending(&self, event: EventType) -> bool {
608669
let gpio_block = $GPIOX::peripheral();
@@ -611,6 +672,10 @@ macro_rules! gpio {
611672
match event {
612673
EventType::High => gpio_block.high_ip().read().bits() & pin_mask != 0,
613674
EventType::Low => gpio_block.low_ip().read().bits() & pin_mask != 0,
675+
EventType::BothLevels => {
676+
(gpio_block.high_ip().read().bits() & pin_mask != 0) ||
677+
(gpio_block.low_ip().read().bits() & pin_mask != 0)
678+
}
614679
EventType::Rise => gpio_block.rise_ip().read().bits() & pin_mask != 0,
615680
EventType::Fall => gpio_block.fall_ip().read().bits() & pin_mask != 0,
616681
EventType::BothEdges => {

‎hifive1-examples/examples/button_interrupt.rs‎

Lines changed: 11 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,7 @@ use core::cell::RefCell;
66
use critical_section::Mutex;
77
use hifive1::{
88
clock,
9-
hal::{
10-
e310x::Gpio0,
11-
gpio::{gpio0, EventType, Input, PullUp},
12-
prelude::*,
13-
DeviceResources,
14-
},
9+
hal::{DeviceResources, gpio::{Input, PullUp, EventType, gpio0}, e310x::Gpio0, prelude::*},
1510
pin, sprintln, stdout, Led,
1611
};
1712
extern crate panic_halt;
@@ -26,12 +21,12 @@ fn gpio9_handler() {
2621
critical_section::with(|cs| {
2722
let button_ref = BUTTON.borrow_ref(cs);
2823
let button = button_ref.as_ref().unwrap();
29-
24+
3025
// Check the interrupt source
31-
if button.is_interrupt_pending(EventType::Rise) {
26+
if button.is_interrupt_pending(EventType::Rise){
3227
sprintln!("Rising Edge");
3328
}
34-
if button.is_interrupt_pending(EventType::Fall) {
29+
if button.is_interrupt_pending(EventType::Fall){
3530
sprintln!("Falling Edge");
3631
}
3732

@@ -60,6 +55,11 @@ fn main() -> ! {
6055
);
6156

6257
sprintln!("Configuring GPIOs...");
58+
59+
// Disable and clear all GPIO interrupts
60+
Gpio0::disable_interrupts(EventType::All);
61+
Gpio0::clear_interrupts(EventType::All);
62+
6363
// Configure button pin (GPIO9) as pull-up input
6464
let button = pins.pin9.into_pull_up_input();
6565
// Configure blue LED pin (GPIO21) as inverted output
@@ -72,11 +72,8 @@ fn main() -> ! {
7272
priorities.reset::<ExternalInterrupt>();
7373
unsafe { priorities.set_priority(ExternalInterrupt::GPIO9, Priority::P1) };
7474

75-
// Disable and clear all GPIO interrupts
76-
Gpio0::disable_interrupts(EventType::All);
77-
Gpio0::clear_interrupts(EventType::All);
78-
7975
// Enable GPIO9 interrupt for both edges
76+
unsafe { button.set_exti_priority(&plic, Priority::P1) };
8077
button.enable_interrupt(EventType::BothEdges);
8178

8279
// Store button pin in a shared resource
@@ -99,12 +96,7 @@ fn main() -> ! {
9996
// Check if the button is low
10097
let mut button_state = false;
10198
critical_section::with(|cs| {
102-
button_state = BUTTON
103-
.borrow_ref_mut(cs)
104-
.as_mut()
105-
.unwrap()
106-
.is_low()
107-
.unwrap();
99+
button_state = BUTTON.borrow_ref_mut(cs).as_mut().unwrap().is_low().unwrap();
108100
});
109101

110102
if button_state {

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