Update riscv to 0.11.1

Author: romancardenas

e310x-hal/CHANGELOG.md

@@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ## [Unreleased]
 
 ### Changed
+- Update `riscv` to 0.11.1
 - Apply clippy changes
 - Use `portable-atomic` with `zaamo` feature to use native `amo*` operations.
 - Official target is now `riscv32imc-unknown-none-elf`, as it does not fully support the A extension.

e310x-hal/Cargo.toml

@@ -13,7 +13,7 @@ rust-version = "1.72"
 [dependencies]
 embedded-hal = { version = "0.2.6", features = ["unproven"] }
 nb = "1.0.0"
-riscv = { version = "0.10.1", features = ["critical-section-single-hart"] }
+riscv = { version = "0.11.1", features = ["critical-section-single-hart"] }
 e310x = { path = "../e310x", version = "0.11.0", features = ["rt", "critical-section"] }
 portable-atomic = { version = "1.9", default-features = false}
 

e310x-hal/src/delay.rs

@@ -113,9 +113,7 @@ impl DelayMs<u32> for Sleep {
         // after which empty handler gets called and we go into the
         // next iteration of this loop
         loop {
-            unsafe {
-                riscv::asm::wfi();
-            }
+            riscv::asm::wfi();
 
             // check if we got the right interrupt cause, otherwise just loop back to wfi
             if mip::read().mtimer() {