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fixup! Implement va_arg for Hexagon Linux musl targets
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compiler/rustc_codegen_llvm/src/va_arg.rs

Lines changed: 8 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -893,7 +893,7 @@ fn emit_hexagon_va_arg_bare_metal<'ll, 'tcx>(
893893

894894
// Calculate offset: round up type size to 4-byte boundary (minimum stack slot size)
895895
let type_size = layout.size.bytes();
896-
let offset = ((type_size + 3) / 4) * 4; // align to 4 bytes
896+
let offset = type_size.next_multiple_of(4); // align to 4 bytes
897897

898898
// Update va_list to point to next argument
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let next_ptr = bx.inbounds_ptradd(aligned_ptr, bx.const_usize(offset));
@@ -903,18 +903,6 @@ fn emit_hexagon_va_arg_bare_metal<'ll, 'tcx>(
903903
bx.load(layout.llvm_type(bx), aligned_ptr, layout.align.abi)
904904
}
905905

906-
fn emit_hexagon_va_arg<'ll, 'tcx>(
907-
bx: &mut Builder<'_, 'll, 'tcx>,
908-
list: OperandRef<'tcx, &'ll Value>,
909-
target_ty: Ty<'tcx>,
910-
is_musl: bool,
911-
) -> &'ll Value {
912-
if is_musl {
913-
emit_hexagon_va_arg_musl(bx, list, target_ty)
914-
} else {
915-
emit_hexagon_va_arg_bare_metal(bx, list, target_ty)
916-
}
917-
}
918906

919907
fn emit_xtensa_va_arg<'ll, 'tcx>(
920908
bx: &mut Builder<'_, 'll, 'tcx>,
@@ -1100,7 +1088,13 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
11001088
// This includes `target.is_like_darwin`, which on x86_64 targets is like sysv64.
11011089
Arch::X86_64 => emit_x86_64_sysv64_va_arg(bx, addr, target_ty),
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Arch::Xtensa => emit_xtensa_va_arg(bx, addr, target_ty),
1103-
Arch::Hexagon => emit_hexagon_va_arg(bx, addr, target_ty, target.env == Env::Musl),
1091+
Arch::Hexagon => {
1092+
if target.env == Env::Musl {
1093+
emit_hexagon_va_arg_musl(bx, addr, target_ty)
1094+
} else {
1095+
emit_hexagon_va_arg_bare_metal(bx, addr, target_ty)
1096+
}
1097+
}
11041098
// For all other architecture/OS combinations fall back to using
11051099
// the LLVM va_arg instruction.
11061100
// https://llvm.org/docs/LangRef.html#va-arg-instruction

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