add inlines

Signed-off-by: Connor Tsui <[email protected]>

Author: connortsui20

vortex-compute/benches/avx512.rs

@@ -53,7 +53,7 @@ fn in_place_scalar(bencher: divan::Bencher, (size, probability): (usize, f64)) {
         .bench_refs(|(data, mask)| filter_in_place_scalar(data, mask))
 }
 
-#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+#[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), not(codspeed)))]
 #[divan::bench(sample_size = SAMPLE_SIZE, args = SIZES.iter().copied().cartesian_product(PROBABILITIES.iter().copied()))]
 fn in_place_avx512(bencher: divan::Bencher, (size, probability): (usize, f64)) {
     let mask = divan::black_box(create_random_mask(size, probability));
@@ -75,7 +75,7 @@ fn out_scalar(bencher: divan::Bencher, (size, probability): (usize, f64)) {
         .bench_refs(|(src, dest, mask)| filter_into_scalar(src, dest, mask))
 }
 
-#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+#[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), not(codspeed)))]
 #[divan::bench(sample_size = SAMPLE_SIZE, args = SIZES.iter().copied().cartesian_product(PROBABILITIES.iter().copied()))]
 fn out_avx512(bencher: divan::Bencher, (size, probability): (usize, f64)) {
     let mask = divan::black_box(create_random_mask(size, probability));

vortex-compute/src/filter/slice/simd_compress.rs

@@ -55,6 +55,7 @@ impl SimdCompress for i32 {
     type MaskType = u16;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi32(mask, vec)
     }
@@ -76,6 +77,7 @@ impl SimdCompress for u32 {
     type MaskType = u16;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi32(mask, vec)
     }
@@ -97,6 +99,7 @@ impl SimdCompress for f32 {
     type MaskType = u16;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         unsafe {
             let float_vec = std::mem::transmute::<__m512i, __m512>(vec);
@@ -126,6 +129,7 @@ impl SimdCompress for i64 {
     type MaskType = u8;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi64(mask, vec)
     }
@@ -147,6 +151,7 @@ impl SimdCompress for u64 {
     type MaskType = u8;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi64(mask, vec)
     }
@@ -168,6 +173,7 @@ impl SimdCompress for f64 {
     type MaskType = u8;
 
     #[target_feature(enable = "avx512f")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         unsafe {
             let double_vec = std::mem::transmute::<__m512i, __m512d>(vec);
@@ -197,6 +203,7 @@ impl SimdCompress for i16 {
     type MaskType = u32;
 
     #[target_feature(enable = "avx512vbmi2")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi16(mask, vec)
     }
@@ -218,6 +225,7 @@ impl SimdCompress for u16 {
     type MaskType = u32;
 
     #[target_feature(enable = "avx512vbmi2")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi16(mask, vec)
     }
@@ -243,6 +251,7 @@ impl SimdCompress for i8 {
     type MaskType = u64;
 
     #[target_feature(enable = "avx512vbmi2")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi8(mask, vec)
     }
@@ -264,6 +273,7 @@ impl SimdCompress for u8 {
     type MaskType = u64;
 
     #[target_feature(enable = "avx512vbmi2")]
+    #[inline]
     unsafe fn compress_vector(mask: Self::MaskType, vec: __m512i) -> __m512i {
         _mm512_maskz_compress_epi8(mask, vec)
     }