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[Cpp API Compatibility] Add XPU device tests #78647

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564f0a4
[Cpp API Compatibility] Add XPU device tests
youge325 Apr 11, 2026
3d72cb7
fix coverage rate
youge325 Apr 12, 2026
74bfdef
Merge branch 'PaddlePaddle:develop' into cXPU
youge325 Apr 13, 2026
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25 changes: 11 additions & 14 deletions paddle/phi/api/include/compat/ATen/core/TensorBody.h
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Original file line number Diff line number Diff line change
Expand Up @@ -138,20 +138,17 @@ class Tensor : public TensorBase {
}

Tensor toBackend(c10::Backend b) const {
if (b == c10::Backend::CPU) {
PaddlePlace place(phi::AllocationType::CPU);
return tensor_.copy_to(place, true);
} else if (b == c10::Backend::CUDA) {
auto place = paddle::DefaultGPUPlace();
return tensor_.copy_to(place, true);
} else if (b == c10::Backend::XPU) {
PaddlePlace place(phi::AllocationType::XPU);
return tensor_.copy_to(place, true);
} else if (b == c10::Backend::IPU) {
PaddlePlace place(phi::AllocationType::IPU);
return tensor_.copy_to(place, true);
} else {
PD_CHECK(false, "Unsupported backend");
switch (b) {
case c10::Backend::CPU:
return tensor_.copy_to(PaddlePlace(phi::AllocationType::CPU), true);
case c10::Backend::CUDA:
return tensor_.copy_to(paddle::DefaultGPUPlace(), true);
case c10::Backend::XPU:
return tensor_.copy_to(paddle::DefaultXPUPlace(), true);
case c10::Backend::IPU:
return tensor_.copy_to(PaddlePlace(phi::IPUPlace()), true);
default:
PD_CHECK(false, "Unsupported backend");
}
return tensor_;
}
Expand Down
8 changes: 4 additions & 4 deletions paddle/phi/api/include/compat/ATen/ops/to.h
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Expand Up @@ -39,11 +39,11 @@ inline at::Tensor Tensor::to(
phi::Place place;
switch (dev.type()) {
case c10::DeviceType::CPU:
place = phi::CPUPlace();
break;
case c10::DeviceType::CUDA:
place = dev.has_index() ? phi::GPUPlace(dev.index())
: paddle::DefaultGPUPlace();
case c10::DeviceType::XPU:
case c10::DeviceType::IPU:
case c10::DeviceType::CUSTOM:
place = dev._PD_GetInner();
break;
default:
PD_THROW("Unsupported device type: ", dev.type());
Expand Down
4 changes: 2 additions & 2 deletions paddle/phi/api/include/compat/c10/core/Device.h
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Expand Up @@ -133,9 +133,9 @@ struct Device final {
case DeviceType::CUDA:
return has_index() ? phi::GPUPlace(index_) : paddle::DefaultGPUPlace();
case DeviceType::XPU:
return phi::XPUPlace(has_index() ? index_ : 0);
return has_index() ? phi::XPUPlace(index_) : paddle::DefaultXPUPlace();
case DeviceType::IPU:
return phi::IPUPlace(has_index() ? index_ : 0);
return has_index() ? phi::IPUPlace(index_) : phi::IPUPlace();
case DeviceType::CUSTOM:
Comment on lines 133 to 139
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Copilot AI Apr 11, 2026

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The PR description says it only adds XPU-related tests, but this change also modifies runtime behavior: XPU devices without an explicit index now resolve to paddle::DefaultXPUPlace() (current device) instead of always using device 0. Please update the PR description (or add release notes) to explicitly call out this semantics change, since it can affect existing users relying on the previous default-device behavior.

Copilot uses AI. Check for mistakes.
return phi::CustomPlace(
custom_device_type_.empty() ? "custom" : custom_device_type_,
Expand Down
58 changes: 58 additions & 0 deletions test/cpp/compat/ATen_basic_test.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,9 @@
#include <c10/cuda/CUDAFunctions.h>
#include <c10/cuda/CUDAGuard.h>
#endif
#ifdef PADDLE_WITH_XPU
#include "paddle/phi/core/platform/device/xpu/xpu_info.h"
#endif
#include "ATen/ATen.h"
#include "gtest/gtest.h"
#include "paddle/common/macros.h"
Expand Down Expand Up @@ -434,6 +437,61 @@ TEST(TensorBodyTest, ToBackendUnsupportedBranch) {
ASSERT_THROW(t.toBackend(static_cast<c10::Backend>(-1)), ::std::exception);
}

TEST(TensorBodyTest, ToBackendCpuBranchCoverage) {
at::Tensor t = at::ones({1}, at::kFloat);
at::Tensor cpu_t = t.toBackend(c10::Backend::CPU);

ASSERT_EQ(cpu_t.device().type(), c10::DeviceType::CPU);
ASSERT_TRUE(cpu_t.equal(t));
}

TEST(TensorBodyTest, ToBackendCudaBranchCoverage) {
at::Tensor t = at::ones({1}, at::kFloat);

try {
at::Tensor cuda_t = t.toBackend(c10::Backend::CUDA);
ASSERT_EQ(cuda_t.device().type(), c10::DeviceType::CUDA);
} catch (const std::exception&) {
SUCCEED();
}
}

TEST(TensorBodyTest, ToBackendXpuBranchCoverage) {
at::Tensor t = at::ones({1}, at::kFloat);

try {
at::Tensor xpu_t = t.toBackend(c10::Backend::XPU);
ASSERT_EQ(xpu_t.device().type(), c10::DeviceType::XPU);
} catch (const std::exception&) {
SUCCEED();
}
}

TEST(TensorBodyTest, ToBackendIpuBranchCoverage) {
at::Tensor t = at::ones({1}, at::kFloat);

try {
at::Tensor ipu_t = t.toBackend(c10::Backend::IPU);
ASSERT_EQ(ipu_t.device().type(), c10::DeviceType::IPU);
} catch (const std::exception&) {
SUCCEED();
}
}

#ifdef PADDLE_WITH_XPU
TEST(TensorBodyTest, ToBackendXpuUsesCurrentDevice) {
if (paddle::platform::GetXPUDeviceCount() < 2) {
return;
}
paddle::platform::XPUDeviceGuard guard(1);
at::Tensor t = at::ones({1}, at::kFloat);
at::Tensor xpu_t = t.toBackend(c10::Backend::XPU);

ASSERT_EQ(xpu_t.device().type(), c10::DeviceType::XPU);
ASSERT_EQ(xpu_t.device().index(), 1);
}
#endif

TEST(TensorBodyTest, MetaUnsupportedBranch) {
at::Tensor t = at::ones({1}, at::kFloat);
ASSERT_THROW((void)t.meta(), ::std::exception);
Expand Down
23 changes: 21 additions & 2 deletions test/cpp/compat/ATen_empty_test.cc
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Expand Up @@ -19,6 +19,13 @@
#include <ATen/ops/empty.h>
#include <c10/core/ScalarType.h>
#include <c10/core/TensorOptions.h>
#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
#include <c10/cuda/CUDAFunctions.h>
#include <c10/cuda/CUDAGuard.h>
#endif
#ifdef PADDLE_WITH_XPU
#include "paddle/phi/core/platform/device/xpu/xpu_info.h"
#endif

#include "ATen/ATen.h"
#include "gtest/gtest.h"
Expand Down Expand Up @@ -55,8 +62,6 @@ TEST(ATenEmptyTest, ExplicitArgsCpu) {
// ======================== pin_memory tests ========================

#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
#include <c10/cuda/CUDAFunctions.h>
#include <c10/cuda/CUDAGuard.h>

// TensorOptions overload: pin_memory via options
TEST(ATenEmptyTest, PinMemoryViaTensorOptions) {
Expand Down Expand Up @@ -154,3 +159,17 @@ TEST(ATenEmptyTest, EmptyCudaOptionsHelperDefaultDeviceUsesCurrentDevice) {
}

#endif // PADDLE_WITH_CUDA || PADDLE_WITH_HIP

#ifdef PADDLE_WITH_XPU
TEST(ATenEmptyTest, DefaultXpuDeviceUsesCurrentDevice) {
if (paddle::platform::GetXPUDeviceCount() < 2) {
return;
}
paddle::platform::XPUDeviceGuard guard(1);
at::Tensor t =
at::empty({8}, at::TensorOptions().dtype(at::kFloat).device(at::kXPU));

ASSERT_EQ(t.device().type(), c10::DeviceType::XPU);
ASSERT_EQ(t.device().index(), 1);
}
#endif
40 changes: 37 additions & 3 deletions test/cpp/compat/ATen_to_test.cc
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Expand Up @@ -25,6 +25,9 @@
#include <c10/cuda/CUDAFunctions.h>
#include <c10/cuda/CUDAGuard.h>
#endif
#ifdef PADDLE_WITH_XPU
#include "paddle/phi/core/platform/device/xpu/xpu_info.h"
#endif
#include "ATen/ATen.h"
#include "gtest/gtest.h"
#include "paddle/phi/common/float16.h"
Expand Down Expand Up @@ -150,9 +153,9 @@ TEST(TensorToTest, ToCopyAndUnsupportedDeviceBranches) {
std::nullopt);
EXPECT_TRUE(pinned.equal(t));

EXPECT_THROW(
t.to(at::TensorOptions().device(c10::Device(c10::DeviceType::XPU, 0))),
::std::exception);
EXPECT_THROW(t.to(at::TensorOptions().device(
c10::Device(static_cast<c10::DeviceType>(-1), 0))),
::std::exception);
}

// ---- Overload 3: to(Device, ScalarType) ----
Expand Down Expand Up @@ -244,3 +247,34 @@ TEST(TensorToTest, ToDeviceWithoutIndexUsesCurrentCudaDevice) {
ASSERT_EQ(result.device().index(), 1);
}
#endif

#ifdef PADDLE_WITH_XPU
TEST(TensorToTest, ToDevice_CPUToXPU) {
if (paddle::platform::GetXPUDeviceCount() == 0) {
return;
}
at::Tensor t = at::tensor({5.0f}, at::kFloat);
at::Tensor result = t.to(c10::Device(c10::kXPU, 0),
at::kFloat,
/*non_blocking=*/false,
/*copy=*/false);

ASSERT_EQ(result.device().type(), c10::DeviceType::XPU);
ASSERT_EQ(result.device().index(), 0);
}

TEST(TensorToTest, ToDeviceWithoutIndexUsesCurrentXpuDevice) {
if (paddle::platform::GetXPUDeviceCount() < 2) {
return;
}
paddle::platform::XPUDeviceGuard guard(1);
at::Tensor t = at::tensor({5.0f}, at::kFloat);
at::Tensor result = t.to(c10::Device(c10::kXPU),
at::kFloat,
/*non_blocking=*/false,
/*copy=*/false);

ASSERT_EQ(result.device().type(), c10::DeviceType::XPU);
ASSERT_EQ(result.device().index(), 1);
}
#endif
17 changes: 17 additions & 0 deletions test/cpp/compat/c10_Device_test.cc
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Expand Up @@ -18,6 +18,9 @@
#include <c10/cuda/CUDAFunctions.h>
#include <c10/cuda/CUDAGuard.h>
#endif
#ifdef PADDLE_WITH_XPU
#include "paddle/phi/core/platform/device/xpu/xpu_info.h"
#endif

#include <sstream>
#include <unordered_map>
Expand Down Expand Up @@ -130,8 +133,22 @@ TEST(DeviceCompatTest, DeviceParseAndPlaceBranches) {
EXPECT_EQ(cuda_no_index._PD_GetInner().GetDeviceId(), 0);
#endif
c10::Device xpu_no_index(c10::DeviceType::XPU);
#ifdef PADDLE_WITH_XPU
auto xpu_device_count = paddle::platform::GetXPUDeviceCount();
if (xpu_device_count > 0) {
EXPECT_EQ(xpu_no_index._PD_GetInner().GetType(), phi::AllocationType::XPU);
}
if (xpu_device_count >= 2) {
paddle::platform::XPUDeviceGuard guard(1);
EXPECT_EQ(c10::Device(c10::DeviceType::XPU)._PD_GetInner().GetDeviceId(),
1);
} else if (xpu_device_count == 1) {
EXPECT_EQ(xpu_no_index._PD_GetInner().GetDeviceId(), 0);
}
#else
EXPECT_EQ(xpu_no_index._PD_GetInner().GetType(), phi::AllocationType::XPU);
EXPECT_EQ(xpu_no_index._PD_GetInner().GetDeviceId(), 0);
#endif
c10::Device ipu_no_index(c10::DeviceType::IPU);
EXPECT_EQ(ipu_no_index._PD_GetInner().GetType(), phi::AllocationType::IPU);
EXPECT_EQ(ipu_no_index._PD_GetInner().GetDeviceId(), 0);
Expand Down
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