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@Tang-Haojin Tang-Haojin commented Sep 1, 2025

拉取/合并请求描述:(PR description)

[

为什么提交这份PR (why to submit this PR)

_IOR() 宏会扩展到 0x8xxxxxxx,这个数字超过了 int 的表示范围。在 switch 语句里,使用相关宏(如 FIONREADFIONWRITE 等)会产生数据溢出。这在 clang 下会产生 overflow converting case value to switch condition type warning,存在潜在风险。在 RT-Thread 代码中,已有部分代码使用了 longunsigned 类型规避这一问题,这个 PR 是为了解决尚未规避的部分。

你的解决方案是什么 (what is your solution)

switch 语句中,使用强制类型转换,将 switch 变量转换成 unsigned 类型后再进行 case 判断。

请提供验证的bsp和config (provide the config and bsp)

基于 virt riscv bsp 进行测试,但修改了部分代码以适配 clang 编译,相关修改如下。

diff --git a/bsp/qemu-virt64-riscv/rtconfig.py b/bsp/qemu-virt64-riscv/rtconfig.py
index 09d530af4a..7dec52efc0 100644
--- a/bsp/qemu-virt64-riscv/rtconfig.py
+++ b/bsp/qemu-virt64-riscv/rtconfig.py
@@ -3,15 +3,15 @@ import os
 # toolchains options
 ARCH        ='risc-v'
 CPU         ='virt64'
-CROSS_TOOL  ='gcc'
+CROSS_TOOL  ='llvm-riscv'
 
 RTT_ROOT = os.getenv('RTT_ROOT') or os.path.join(os.getcwd(), '..', '..')
 
 if os.getenv('RTT_CC'):
     CROSS_TOOL = os.getenv('RTT_CC')
 
-if  CROSS_TOOL == 'gcc':
-    PLATFORM    = 'gcc'
+if  CROSS_TOOL == 'llvm-riscv':
+    PLATFORM    = 'llvm-riscv'
     EXEC_PATH   = os.getenv('RTT_EXEC_PATH') or '/usr/bin'
 else:
     print('Please make sure your toolchains is GNU GCC!')
@@ -19,28 +19,28 @@ else:
 
 BUILD = 'debug'
 
-if PLATFORM == 'gcc':
+if PLATFORM == 'llvm-riscv':
     # toolchains
     PREFIX  = os.getenv('RTT_CC_PREFIX') or 'riscv64-unknown-elf-'
-    CC      = PREFIX + 'gcc'
-    CXX     = PREFIX + 'g++'
-    AS      = PREFIX + 'gcc'
-    AR      = PREFIX + 'ar'
-    LINK    = PREFIX + 'gcc'
+    CC      = PREFIX + 'clang'
+    CXX     = PREFIX + 'clang++'
+    AS      = PREFIX + 'clang'
+    AR      = PREFIX + 'llvm-ar'
+    LINK    = PREFIX + 'clang++'
     TARGET_EXT = 'elf'
     SIZE    = PREFIX + 'size'
     OBJDUMP = PREFIX + 'objdump'
     OBJCPY  = PREFIX + 'objcopy'
 
     DEVICE  = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64 '
-    CFLAGS  = DEVICE + '-ffreestanding -flax-vector-conversions -Wno-cpp -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -fdiagnostics-color=always'
+    CFLAGS  = DEVICE + '-flax-vector-conversions -Wno-cpp -fno-common -ffunction-sections -fdata-sections -fdiagnostics-color=always -Xclang -fexperimental-max-bitint-width=65536'
     AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__ '
-    LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static'
+    LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -stdlib=libstdc++ -lc -lsupc++ -lgcc -lstdc++ -static'
     CPATH   = ''
     LPATH   = ''
 
     if BUILD == 'debug':
-        CFLAGS += ' -O0 -ggdb -fvar-tracking '
+        CFLAGS += ' -O0 -ggdb '
         AFLAGS += ' -ggdb'
     else:
         CFLAGS += ' -O2 -Os'
diff --git a/components/libc/compilers/common/extension/SConscript b/components/libc/compilers/common/extension/SConscript
index 58e43dd62e..2f35bb0d47 100644
--- a/components/libc/compilers/common/extension/SConscript
+++ b/components/libc/compilers/common/extension/SConscript
@@ -9,7 +9,7 @@ group = []
 
 src += Glob('*.c')
 
-if rtconfig.PLATFORM not in ['gcc', 'llvm-arm']:
+if rtconfig.PLATFORM not in ['gcc', 'llvm-arm', 'llvm-riscv']:
     group = DefineGroup('Compiler', src, depend = [''], CPPPATH = CPPPATH)
 
 list = os.listdir(cwd)
  • BSP: bsp/qemu-virt64-riscv
  • .config: 默认配置,无需额外修改
  • action:

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality:

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码,代码尽量精简,不包含#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification
  • 如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

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CLAassistant commented Sep 1, 2025

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All committers have signed the CLA.

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github-actions bot commented Sep 1, 2025

📌 Code Review Assignment

🏷️ Tag: components

Reviewers: Maihuanyi

Changed Files (Click to expand)
  • components/drivers/ipc/pipe.c
  • components/drivers/serial/dev_serial.c
  • components/drivers/serial/dev_serial_v2.c

🏷️ Tag: components_driver_serial_v2

Reviewers: Ryan-CW-Code

Changed Files (Click to expand)
  • components/drivers/serial/dev_serial_v2.c

📊 Current Review Status (Last Updated: 2025-09-01 12:06 CST)

  • Maihuanyi Pending Review
  • Ryan-CW-Code Pending Review

📝 Review Instructions

  1. 维护者可以通过单击此处来刷新审查状态: 🔄 刷新状态
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  2. 确认审核通过后评论 LGTM/lgtm
    Comment LGTM/lgtm after confirming approval

  3. PR合并前需至少一位维护者确认
    PR must be confirmed by at least one maintainer before merging

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@Rbb666
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Rbb666 commented Sep 1, 2025

修改成 rt_ubase_t 好一些

@Tang-Haojin
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修改成 rt_ubase_t 好一些

@Rbb666 已修改,多谢

@Rbb666 Rbb666 merged commit 728d9e4 into RT-Thread:master Sep 1, 2025
61 checks passed
tomjielii pushed a commit to tomjielii/rt-thread that referenced this pull request Sep 9, 2025
tomjielii pushed a commit to tomjielii/rt-thread that referenced this pull request Sep 12, 2025
@Rbb666 Rbb666 added this to the v5.2.2 milestone Sep 23, 2025
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3 participants