Skip to content
Open
Show file tree
Hide file tree
Changes from 6 commits
Commits
Show all changes
42 commits
Select commit Hold shift + click to select a range
2668059
[plugins] Add boilerplate for ReplayCache plugin
jochembroekhoff Mar 2, 2023
81e9e47
[plugins] Prepare for new async wrireback cache
jochembroekhoff Mar 7, 2023
dc6ec74
[plugins] Implement basic async writeback cache
jochembroekhoff Mar 9, 2023
c9cf754
[plugins] Add some clarifying comments
jochembroekhoff Mar 14, 2023
3906cb5
[plugins] Implement dynamic cache configuration
jochembroekhoff Mar 14, 2023
96ceb7c
[plugins] Estimate ReplayCache cycle costs
jochembroekhoff Mar 14, 2023
13b1782
[plugins] Report basic statistics
jochembroekhoff Mar 14, 2023
0575216
[plugins] Gather various additional statistics
jochembroekhoff Mar 16, 2023
59fc9db
[plugins] Implement WB queue size and parallelism configuration and e…
jochembroekhoff Mar 21, 2023
c658e08
[plugins] Fail correctly for pending WB requests
jochembroekhoff Mar 22, 2023
5864fb4
[plugins] Fix AWBC compilation
jochembroekhoff Apr 5, 2023
d2cf32d
[plugins] Detect infinite checkpoint loops
jochembroekhoff Apr 5, 2023
986a20b
[chore] Remove chipyard, noelle and iclang
jochembroekhoff Apr 25, 2023
ed916ee
[chore] Make build scripts CMake generator-agnostic
jochembroekhoff Apr 25, 2023
cb95b1b
[chore] Remove passes directory
jochembroekhoff Apr 25, 2023
ec5c0d3
[chore] Revise benchmark build scripts
jochembroekhoff Apr 25, 2023
475c16c
Move to LLVM 16.0.2
jochembroekhoff Apr 26, 2023
65d2c69
Merge pull request #11 from TUDSSL/repo-cleanup
iiKoe Apr 26, 2023
85d596a
[icemu] Update ICEMu
jochembroekhoff May 3, 2023
e074e69
[plotting] Support plotting from Docker container
jochembroekhoff May 3, 2023
806364b
[docker] Move to Ubuntu 22.04
jochembroekhoff May 3, 2023
a57aba7
[llvm] Download pre-built binary version
jochembroekhoff May 3, 2023
aaeca89
[llvm] Skip libcxx benchmarks
jochembroekhoff May 4, 2023
cfd8024
[llvm] Implement diff calculation
jochembroekhoff May 4, 2023
a9d4b45
[benchmarks] Account for ReplayCache
jochembroekhoff May 4, 2023
73faf4a
[plugins] Run CLWB during recovery
jochembroekhoff May 11, 2023
2fe2b9d
[plugins] Add continuous logging for ReplayCache
jochembroekhoff May 11, 2023
2dee7ab
[plugins] Optimize p_debug
jochembroekhoff May 11, 2023
f6ccb44
[benchmarks] Build with link-time optimization
jochembroekhoff May 24, 2023
a9e58de
[benchmarks] Fix running ReplayCache PF targets
jochembroekhoff May 24, 2023
c100f02
[plugins] ReplayCache: fix compressed store parse
jochembroekhoff May 25, 2023
5ff37af
[plugins] Remove end-region command and cleanup
jochembroekhoff Jun 7, 2023
506d04c
[plugins] Print debug info with "[awbc]" leader
jochembroekhoff Jun 7, 2023
776944e
[plugins] Assert no store-after-fence
jochembroekhoff Jun 8, 2023
b3d2c50
[plugins,llvm] Use ADDI/C.LI instead of AUIPC
jochembroekhoff Jun 8, 2023
c58b8f9
[replaycache] Implement proof-of-concept of final pass
jochembroekhoff Jun 14, 2023
bd3753a
[replaycache] Don't generate CLWB if there is no next instr
jochembroekhoff Jun 14, 2023
3dbc47e
[replaycache] Add some comments
jochembroekhoff Jun 15, 2023
5b488d5
[replaycache] Move final pass to before branch relaxation
jochembroekhoff Jun 22, 2023
e269eb1
[replaycache] Perform manual branch analysis
jochembroekhoff Jun 22, 2023
e48c9ad
[replaycache] Add store integrity sanity check
jochembroekhoff Jun 29, 2023
d1c90fc
Update README.md
jochembroekhoff Sep 18, 2023
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion icemu/plugins/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -43,4 +43,4 @@ include_directories(${PROJECT_SOURCE_DIR}/../icemu/plugins/common)
add_subdirectory(simple_war_detect_plugin)
add_subdirectory(custom_cache_plugin)
add_subdirectory(memory_stats_plugin)

add_subdirectory(replay_cache_plugin)
70 changes: 60 additions & 10 deletions icemu/plugins/includes/Checkpoint.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ class Checkpoint {

static const size_t checkpoint_size = 32+2;
uint32_t SavedRegisters[checkpoint_size];

icemu::memseg_t *main_memseg;
size_t memory_size;
uint8_t *SavedMemory;
Expand Down Expand Up @@ -127,15 +127,15 @@ class Checkpoint {

// Restore all the registers
arch.registerSet(icemu::ArchitectureRiscv32::REG_X0, src[0]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X1, src[1]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X2, src[2]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X3, src[3]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X4, src[4]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X5, src[5]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X6, src[6]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X7, src[7]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X8, src[8]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X9, src[9]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X1, src[1]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X2, src[2]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X3, src[3]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X4, src[4]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X5, src[5]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X6, src[6]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X7, src[7]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X8, src[8]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X9, src[9]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X10, src[10]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X11, src[11]);
arch.registerSet(icemu::ArchitectureRiscv32::REG_X12, src[12]);
Expand Down Expand Up @@ -168,4 +168,54 @@ class Checkpoint {
return checkpoint_size;
}

/*
* Get the checkpointed value of a register.
*/
uint32_t getRegister(icemu::ArchitectureRiscv32::Register reg) {
return getRegister(reg, SavedRegisters);
}

uint32_t getRegister(icemu::ArchitectureRiscv32::Register reg, uint32_t *src) {
switch (reg) {
case icemu::ArchitectureRiscv32::REG_X0: return src[0];
case icemu::ArchitectureRiscv32::REG_X1: return src[1];
case icemu::ArchitectureRiscv32::REG_X2: return src[2];
case icemu::ArchitectureRiscv32::REG_X3: return src[3];
case icemu::ArchitectureRiscv32::REG_X4: return src[4];
case icemu::ArchitectureRiscv32::REG_X5: return src[5];
case icemu::ArchitectureRiscv32::REG_X6: return src[6];
case icemu::ArchitectureRiscv32::REG_X7: return src[7];
case icemu::ArchitectureRiscv32::REG_X8: return src[8];
case icemu::ArchitectureRiscv32::REG_X9: return src[9];
case icemu::ArchitectureRiscv32::REG_X10: return src[10];
case icemu::ArchitectureRiscv32::REG_X11: return src[11];
case icemu::ArchitectureRiscv32::REG_X12: return src[12];
case icemu::ArchitectureRiscv32::REG_X13: return src[13];
case icemu::ArchitectureRiscv32::REG_X14: return src[14];
case icemu::ArchitectureRiscv32::REG_X15: return src[15];
case icemu::ArchitectureRiscv32::REG_X16: return src[16];
case icemu::ArchitectureRiscv32::REG_X17: return src[17];
case icemu::ArchitectureRiscv32::REG_X18: return src[18];
case icemu::ArchitectureRiscv32::REG_X19: return src[19];
case icemu::ArchitectureRiscv32::REG_X20: return src[20];
case icemu::ArchitectureRiscv32::REG_X21: return src[21];
case icemu::ArchitectureRiscv32::REG_X22: return src[22];
case icemu::ArchitectureRiscv32::REG_X23: return src[23];
case icemu::ArchitectureRiscv32::REG_X24: return src[24];
case icemu::ArchitectureRiscv32::REG_X25: return src[25];
case icemu::ArchitectureRiscv32::REG_X26: return src[26];
case icemu::ArchitectureRiscv32::REG_X27: return src[27];
case icemu::ArchitectureRiscv32::REG_X28: return src[28];
case icemu::ArchitectureRiscv32::REG_X29: return src[29];
case icemu::ArchitectureRiscv32::REG_X30: return src[30];
case icemu::ArchitectureRiscv32::REG_X31: return src[31];
case icemu::ArchitectureRiscv32::REG_PC: return src[32];
case icemu::ArchitectureRiscv32::REG_MSTATUS: return src[33];
default: break;
}

assert(false && "Invalid register");
return 0;
}

};
33 changes: 33 additions & 0 deletions icemu/plugins/includes/LocalMemory.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,19 @@ class LocalMemory {

public:
LocalMemory() = default;
LocalMemory(const LocalMemory &) = delete;
LocalMemory(LocalMemory &&o)
: reads(std::move(o.reads)),
writes(std::move(o.writes)),
MainMemSegment(o.MainMemSegment),
LocalMem(o.LocalMem),
EmuMem(o.EmuMem),
mem(o.mem) {
o.MainMemSegment = nullptr;
o.LocalMem = nullptr;
o.EmuMem = nullptr;
o.mem = nullptr;
}
~LocalMemory() { delete[] LocalMem; }

// Initialize the local memory and store a copy of the same
Expand Down Expand Up @@ -101,8 +114,25 @@ class LocalMemory {
// MainMemSegment->origin << dec << endl;
}

// Write the value of the given size to the emulator memory
void emulatorWrite(address_t address, address_t value, address_t size) {
p_debug << "[NVM Write] writing to addr: " << hex << address
<< " data: " << value << dec << endl;
address_t address_idx = address - MainMemSegment->origin;
for (address_t i = 0; i < size; i++) {
uint64_t byte = (value >> (8 * i)) & 0xFF; // Get the bytes
EmuMem[address_idx + i] = byte;
}
// cout << "[emu write] wrote " << hex << (address_t)EmuMem[address_idx] <<
// " to mem: " << hex << address_idx + MainMemSegment->origin << dec <<
// endl;
}

// Read the local memory copy from the address specified
uint64_t localRead(address_t address, address_t size) {
ASSERT(address >= MainMemSegment->origin);
ASSERT(address + size <= MainMemSegment->origin + MainMemSegment->length);

address_t address_idx = address - MainMemSegment->origin;
uint64_t data = 0;
for (address_t i = 0; i < size; i++) {
Expand All @@ -115,6 +145,9 @@ class LocalMemory {

// Read the value from the emulator memory
uint64_t emulatorRead(address_t address, address_t size) {
ASSERT(address >= MainMemSegment->origin);
ASSERT(address + size <= MainMemSegment->origin + MainMemSegment->length);

address_t address_idx = address - MainMemSegment->origin;
uint64_t data = 0;
for (address_t i = 0; i < size; i++) {
Expand Down
Loading