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Coverage ReportCreated: 2026-03-27 17:59Click here for information about interpreting this report.
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Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
… are placed correctly. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
…nnected by objectfifo.link together. - The common column function was incorrectly obtaining a global best column when it should be by fifo or fifoGroup if linked. - Reformatted the placement code structure; PlacementAnalysis is kept thin, considered removal but this allows re-calling placer or even a set of placers if future implementation is iterative placement. - Each placer will obtain its own necessary mlir ops. - Canonicalization was accidentally removing logical tiles because they appear the same in syntax; removed Pure trait. TODO: - Trace support is not added for IRON and mlir itself; trace operations aren't mapped to use aie.logical_tile. - cores_per_column that limits sequentialplacer's row usage feature not implemented yet.
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- Add GEN_PASS_DEF_AIEPLACETILES to properly generate pass base class - Use fully qualified xilinx::AIE::impl::AIEPlaceTilesBase for CRTP - Add -split-input-file flag to cores_per_col test for multi-module files - Revert example changes (pass not yet registered to aiecc pipeline) Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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- Add MemTile DMA exhaustion test (single-column device) - Add allocation_scheme attribute copy test - Add unknown placer error test Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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Pull request overview
This PR introduces a new --aie-place-tiles MLIR pass that performs logical-to-physical tile placement using a C++ sequential placer, then rewrites aie.logical_tile ops into concrete aie.tile ops.
Changes:
- Add
AIEPlaceTilespass + options (placer,cores-per-col) and wire it into the AIE transforms library build. - Implement a C++
Placerinterface with an initialSequentialPlacer+PlacementAnalysis. - Add a focused lit test suite for sequential placement behavior and error cases; adjust
aie.logical_tiletraits to avoid incorrect IR canonicalization/CSE.
Reviewed changes
Copilot reviewed 16 out of 16 changed files in this pull request and generated 6 comments.
Show a summary per file
| File | Description |
|---|---|
| test/place-tiles/unknown_placer.mlir | Verifies unknown placer option produces an error. |
| test/place-tiles/sequential_placer/test_objectfifo_link.mlir | Tests placement behavior around aie.objectfifo.link grouping/column choice. |
| test/place-tiles/sequential_placer/place_tiles_simple.mlir | Tests basic core placement and attribute propagation (allocation_scheme). |
| test/place-tiles/sequential_placer/place_tiles_objectfifo.mlir | Tests mem/shim/core placement interactions across multiple ObjectFifos/consumers. |
| test/place-tiles/sequential_placer/place_tiles_constrained.mlir | Tests fully constrained and mixed constrained/unconstrained placement cases. |
| test/place-tiles/sequential_placer/partial_constraints_ignored.mlir | Documents current behavior: partial constraints are ignored. |
| test/place-tiles/sequential_placer/edge_detect.mlir | End-to-end style test matching expected placement for an edge-detect pattern. |
| test/place-tiles/sequential_placer/cores_per_col.mlir | Tests cores-per-col option spreads cores across columns. |
| test/place-tiles/sequential_placer/channel_capacity_bad.mlir | Negative tests for DMA channel capacity validation / exhaustion. |
| lib/Dialect/AIE/Transforms/CMakeLists.txt | Adds new placer + placement pass sources to the transforms library. |
| lib/Dialect/AIE/Transforms/AIEPlaceTiles.cpp | Implements the --aie-place-tiles pass and logical→physical tile rewrite. |
| lib/Dialect/AIE/Transforms/AIEPlacer.cpp | Implements the sequential placement algorithm + channel accounting and grouping. |
| include/aie/Dialect/AIE/Transforms/AIEPlacer.h | Declares placer interface and sequential placer/analysis types. |
| include/aie/Dialect/AIE/Transforms/AIEPasses.td | Declares the new aie-place-tiles pass and CLI options. |
| include/aie/Dialect/AIE/Transforms/AIEPasses.h | Exposes createAIEPlaceTilesPass() factory. |
| include/aie/Dialect/AIE/IR/AIEOps.td | Removes Pure from aie.logical_tile to prevent incorrect CSE/canonicalization. |
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- Add ShimPLTile error diagnostic for unsupported unplaced ShimPLTiles - Add fallback placement for non-core tiles not in ObjectFifos - Fix comment: row-major -> column-major placement - Reduce over-commenting in AIEPlacer.cpp - Reorganize tests: consolidate 8 files into 5 with split-input-file Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
…ed consider adding back.
hunhoffe
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Overall, this looks very good! I'd prefer a bit more testing (although the current Placer isn't that well tested).
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| // RUN: not aie-opt --split-input-file --aie-place-tiles %s 2>&1 | FileCheck %s |
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Are there any other error cases you need to check?
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I think there need to be a few more tests about column grouping, exceeding channels (so place near column group)
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| //===- test_place_basic.mlir -----------------------------------*- MLIR -*-===// | |||
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There might need to be a test for "exactly fills capacity" in various ways. It's good to double check the edge cases.
…roved tests - Convert placer pass option from string to enum (PlacerType) - Fix partial constraint support for CoreTile, MemTile, and ShimTile - Add cores-per-col validation against device capacity Test improvements: - Use separate logical tiles per fifo to properly test merging behavior - Add CHECK-NOT patterns to verify no extra tiles created during merging - Add exact capacity tests (core, shim, memtile channel limits) - Add overflow tests (partial capacity remaining triggers new tile) - Add error tests: ShimNOC/MemTile exhaustion, compute tile exhaustion
hunhoffe
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Looks good! Thanks for the changes/tests
Summary
This PR implements the
--aie-place-tilespass with sequential placer algorithm,completing logical-to-physical tile mapping.Changes
aieccfor now.Future PR
Update (2026-03-18): Change plans to merge this PR first as it's self isolated. Will introduce this pass without registering to
aiecc.cppand part of lowering pipeline. This pass has been verified with local tests.Update (2026-03-24):
Review Changes:
cores-per-colexceeding device capacity, exact capacity fitting.