Multikernel #2
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Multikernel #2
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… any config change in build_sdk.py
…res with their own stack
Signed-off-by: julia <[email protected]>
…nel elfs that had to be compiled, happy to be asked about anything
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Running qemu with -d guest_errors would previously print out
LDR|INFO: Setting all interrupts to Group 1
LDR|INFO: GICv2 ITLinesNumber: 0x00000000
gic_cpu_write: Bad offset 80
gicv2m_write: Bad offset 4
The first write is supposed to be into the GIC_DIST region, then the
second into the GIC_CPU region. Cross referencing to QEMU [1], the GIC
addresses in loader.c are incorrect. Now microkit prints:
LDR|INFO: Setting all interrupts to Group 1
LDR|INFO: GICv2 ITLinesNumber: 0x00000008
The generated seL4 devices_gen.h from the DTS is correct, this is purely
a microkit issue.
[1]: https://github.com/qemu/qemu/blame/de278e54/hw/arm/virt.c#L164-L165
Signed-off-by: julia <[email protected]>
* setup the exception handling at the start of the loader * setup exception handler for EL2 when we enable the MMU instead of just EL1. Signed-off-by: Ivan-Velickovic <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: julia <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Both of these match sel4bench, yay Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
this is prelim for a cross core version of this. name,mean,stddev,min,max,runs,sum,sum_squared signal low to high same core,980.27163,17.20088158040001,945,1745,100000,98027163,96122833891 signal high to low same core,503.23385,23.43306646978741,493,1224,100000,50323385,25379341639 signal high to low cross core,483.34956,19.77788582751853,480,1251,100000,48334956,23401796192 signal 2way low to high same core,1960.52388,32.47431061232068,1900,2758,100000,196052388,384470846490 1960.52 is almost perfectly 2x 980.27, wow. Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
smp is: https://github.com/au-ts/microkit/tree/julia/smp-cross-core-benches Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
... mostly. can't figure out what's going on with the CTLR bits check in seL4 Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
this fixes translation faults due to us overwriting uboot page tables. Signed-off-by: Julia Vassiliki <[email protected]>
stops double interrupt Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
Signed-off-by: Julia Vassiliki <[email protected]>
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https://github.com/au-ts/multikernel-manifest