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Feature/remove toc not included warnings #721
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@@ -59,6 +59,7 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c | |
| - ``{workspace}``: Output directory for generated files | ||
| - ``system-domain.dts``: Domain-specific device-tree file generated in Step 1 | ||
| - ``{proc}``: Processor name (refer to the processor name in the ``pl.dtsi`` file - this varies based on the processor configuration in the Vivado design) | ||
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| **Optional**: - ``{zephyr_board_dts}``: Zephyr board-specific device-tree configuration. When provided, it will be compared against the domain-specific device-tree and removes unneeded nodes as per design configuration or mapping requirements | ||
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| **Output**: ``system-zephyr.dts`` - Zephyr-specific device-tree file | ||
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@@ -71,13 +72,13 @@ This step transforms the domain-specific device-tree from Step 1 into a Zephyr-c | |
| Platform-Specific Processor Names | ||
| --------------------------------- | ||
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| +----------------+--------------------+ | ||
| | Platform | Processor Name | | ||
| +================+====================+ | ||
| | Versal Gen 2 | ``cortexa78_0`` | | ||
| +----------------+--------------------+ | ||
| +----------------+---------------------+ | ||
| | Platform | Processor Name | | ||
| +================+=====================+ | ||
| | Versal Gen 2 | ``cortexa78_0`` | | ||
| +----------------+---------------------+ | ||
| | Versal Net | ``psx_cortexa78_0`` | | ||
| +----------------+--------------------+ | ||
| +----------------+---------------------+ | ||
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| Prerequisites | ||
| ------------- | ||
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@@ -100,8 +101,8 @@ Example Workflow | |
| For Versal Gen 2 Platform: | ||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
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| Basic Workflow (without board-specific device-tree): | ||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| Gen 2 Basic Workflow (without board-specific device-tree): | ||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
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Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I know very little about sphinx (outside of occasioning editing file and generating with it). What is the significance of "Gen 2" in the updated lines ?
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. You can enable autosectionlabel generation when using sphinx/doxygen. i.e. for every heading in an rst or md file a label is created based on the heading. https://www.sphinx-doc.org/en/master/usage/extensions/autosectionlabel.html |
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@@ -111,8 +112,9 @@ Basic Workflow (without board-specific device-tree): | |
| # Step 2: Generate Zephyr-specific device-tree | ||
| lopper -f --enhanced -O ./output ./output/system-domain.dts ./output/system-zephyr.dts -- gen_domain_dts cortexa78_0 zephyr_dt | ||
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| Advanced Workflow (with board-specific device-tree optimization): | ||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
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| Gen 2 Advanced Workflow (with board-specific device-tree optimization): | ||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
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I'd prefer to leave this as-is, there's different consumers of this, and I'm not fond of tweaking it to suit one over the others.
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Ok. fair.