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[HIP][SPIRV] Enable the SPIRV backend instead of the translator through an experimental flag. #162282

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[HIP][SPIRV] Enable the SPIRV backend instead of the translator through an experimental flag. #162282

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e89ce89
[HIP][SPIRV] Enable the SPIRV backend instead of the translator throu…
mgcarrasco Oct 7, 2025
8d56d95
Switch to hip prefix for new flags.
mgcarrasco Oct 10, 2025
d69850d
Remove hip prefix.
mgcarrasco Oct 10, 2025
13d77d9
Remove "COM:".
mgcarrasco Oct 10, 2025
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14 changes: 14 additions & 0 deletions clang/include/clang/Driver/Options.td
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Original file line number Diff line number Diff line change
Expand Up @@ -5483,6 +5483,20 @@ defm wavefrontsize64 : SimpleMFlag<"wavefrontsize64",
defm amdgpu_precise_memory_op
: SimpleMFlag<"amdgpu-precise-memory-op", "Enable", "Disable",
" precise memory mode (AMDGPU only)">;
def amdgpu_use_experimental_spirv_backend
: Flag<["-"], "amdgpu-use-experimental-spirv-backend">,
Group<m_amdgpu_Features_Group>,
Flags<[HelpHidden]>,
Visibility<[ClangOption]>,
HelpText<"Use experimental SPIRV backend for AMDGPU compilation (AMDGPU "
"only)">;
def no_amdgpu_use_experimental_spirv_backend
: Flag<["-"], "no-amdgpu-use-experimental-spirv-backend">,
Group<m_amdgpu_Features_Group>,
Flags<[HelpHidden]>,
Visibility<[ClangOption]>,
HelpText<"Do not use experimental SPIRV backend for AMDGPU compilation "
"(AMDGPU only)">;

def munsafe_fp_atomics : Flag<["-"], "munsafe-fp-atomics">,
Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>, Alias<fatomic_ignore_denormal_mode>;
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36 changes: 27 additions & 9 deletions clang/lib/Driver/ToolChains/HIPAMD.cpp
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Expand Up @@ -175,15 +175,33 @@ void AMDGCN::Linker::constructLinkAndEmitSpirvCommand(

constructLlvmLinkCommand(C, JA, Inputs, LinkedBCFile, Args);

// Emit SPIR-V binary.
llvm::opt::ArgStringList TrArgs{
"--spirv-max-version=1.6",
"--spirv-ext=+all",
"--spirv-allow-unknown-intrinsics",
"--spirv-lower-const-expr",
"--spirv-preserve-auxdata",
"--spirv-debug-info-version=nonsemantic-shader-200"};
SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile, TrArgs);
bool UseSPIRVBackend = Args.hasFlag(
options::OPT_amdgpu_use_experimental_spirv_backend,
options::OPT_no_amdgpu_use_experimental_spirv_backend, /*Default=*/false);

// Emit SPIR-V binary either using the SPIRV backend or the translator.
if (UseSPIRVBackend) {
llvm::opt::ArgStringList CmdArgs;
const char *Triple =
C.getArgs().MakeArgString("-triple=spirv64-amd-amdhsa");
CmdArgs.append({"-cc1", Triple, "-emit-obj", LinkedBCFile.getFilename(),
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@AlexVlx AlexVlx Oct 10, 2025 •
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I think we should consider invoking llc directly here, rather than round-tripping via clang, since this is an implementation detail. Failing that, we will have to pass a number of flags, and possibly gate which args, if any, get forwarded.

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No, using llc is vetoed. The correct way to codegen is to use cc1

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This also seems to be reinventing driver infrastructure it shouldn't need to? There should be some function to call for this. In particular I'm worried about the hardcoded -emit-obj here, probably breaks -save-temps?

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If we use the backend I don't know why we'd need special handling here. Right now this target stops at LLVM-IR, just make it emit object instead of emit IR. This flag should likely just disable this behavior entirely.

Note how clang --target=spirv64-- works as I would expect.

"-o", Output.getFilename()});
const char *Exec = getToolChain().getDriver().getClangProgramPath();
C.addCommand(std::make_unique<Command>(JA, *this,
ResponseFileSupport::None(), Exec,
CmdArgs, LinkedBCFile, Output));
} else {
// Use the SPIRV translator for code gen.
llvm::opt::ArgStringList TrArgs{
"--spirv-max-version=1.6",
"--spirv-ext=+all",
"--spirv-allow-unknown-intrinsics",
"--spirv-lower-const-expr",
"--spirv-preserve-auxdata",
"--spirv-debug-info-version=nonsemantic-shader-200"};
SPIRV::constructTranslateCommand(C, *this, JA, Output, LinkedBCFile,
TrArgs);
}
}

// For amdgcn the inputs of the linker job are device bitcode and output is
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12 changes: 12 additions & 0 deletions clang/test/Driver/amdgpu-spirv-backend-opt.c
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@@ -0,0 +1,12 @@
// COM: This test case validates the behavior of -amdgpu-use-experimental-spirv-backend

// COM: Test that -amdgpu-use-experimental-spirv-backend calls clang -cc1 with the SPIRV triple.
// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -amdgpu-use-experimental-spirv-backend -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-BACKEND
// CHECK-SPIRV-BACKEND: "{{.*}}clang{{.*}}" "-cc1" "{{.*-triple=spirv64-amd-amdhsa}}"

// COM: Test that -no-amdgpu-use-experimental-spirv-backend calls the SPIRV translator
// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -no-amdgpu-use-experimental-spirv-backend -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-TRANSLATOR
// CHECK-SPIRV-TRANSLATOR: "{{.*llvm-spirv.*}}" "{{--spirv-max-version=[0-9]+\.[0-9]}}"

// COM: Test that by default we use the translator
// RUN: %clang -x hip %s --cuda-device-only --offload-arch=amdgcnspirv -nogpuinc -nogpulib -### 2>&1 | FileCheck %s --check-prefix=CHECK-SPIRV-TRANSLATOR