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[BUG] Missing Memory Write Log for AMO Instructions

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3130 In openhwgroup/cva6;

· canxin121 opened on Oct 24, 2025

Issues with xcelium simulation

Status: Open.

#3127 In openhwgroup/cva6;

· RakeshpatilLB opened on Oct 22, 2025

[BUG] <code>sb x3, 0(x2)</code> mis-traps when followed by <code>hlvx.hu x20, 0(x2)</code> after PMP CSR reads

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3126 In openhwgroup/cva6;

· canxin121 opened on Oct 22, 2025

[BUG] <code>fsqrt.h</code> NaN Canonicalization Bug

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3125 In openhwgroup/cva6;

· canxin121 opened on Oct 21, 2025

[BUG] <code>fdiv.h</code> NaN Canonicalization Bug

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3124 In openhwgroup/cva6;

· canxin121 opened on Oct 21, 2025

[BUG] NaN-Boxing Violation in <code>fdiv.s</code>

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3123 In openhwgroup/cva6;

· canxin121 opened on Oct 21, 2025

[BUG] FPU-to-Integer Trace Mislogging

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3122 In openhwgroup/cva6;

· canxin121 opened on Oct 21, 2025

[BUG] Retiming not applied to fpnew_fma during synthesis with DC

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3117 In openhwgroup/cva6;

· 0rd1narY1 opened on Oct 16, 2025

Adjust Simulation clock frequency?

Status: Open.

#3116 In openhwgroup/cva6;

· YiKangOY opened on Oct 15, 2025

Possible exception overwrite in pmp_data_if.sv

Status: Open.

#3115 In openhwgroup/cva6;

· Jbalkind opened on Oct 15, 2025

[BUG] Legacy WB cache subsystem does not check for SLVERR on AXI responses

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3114 In openhwgroup/cva6;

· ricted98 opened on Oct 15, 2025

[BUG] &lt;title&gt; Missing file during Doc building

Type:BugFor bugs in the RTL, Documentation, Verification environment or Tool and Build systemFor bugs in the RTL, Documentation, Verification environment or Tool and Build system

Status: Open.

#3111 In openhwgroup/cva6;

· EthanRyne opened on Oct 9, 2025