Support for NXP S32K14XX

.github/workflows/test-configs.yml

@@ -216,6 +216,30 @@ jobs:
       arch: arm
       config-file: ./config/examples/mcxw-tz.config
 
+  nxp_s32k142_test:
+    uses: ./.github/workflows/test-build.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/nxp-s32k142.config
+
+  nxp_s32k144_test:
+    uses: ./.github/workflows/test-build.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/nxp-s32k144.config
+
+  nxp_s32k146_test:
+    uses: ./.github/workflows/test-build.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/nxp-s32k146.config
+
+  nxp_s32k148_test:
+    uses: ./.github/workflows/test-build.yml
+    with:
+      arch: arm
+      config-file: ./config/examples/nxp-s32k148.config
+
   microchip_mpfs250_test:
     uses: ./.github/workflows/test-build-riscv.yml
     with:

.gitignore

@@ -38,6 +38,7 @@
 *.rom
 *.bin
 *.efi
+*.srec
 
 # Debug files
 *.dSYM/

Makefile

@@ -458,6 +458,10 @@ endif
 		$(WOLFBOOT_ORIGIN) wolfboot.bin \
 		$(WOLFBOOT_PARTITION_BOOT_ADDRESS) test-app/image_v1_signed.bin
 
+factory.srec: factory.bin
+	@echo "\t[BIN2SREC] $@"
+	$(Q)$(OBJCOPY) -I binary -O srec --change-addresses=$(WOLFBOOT_ORIGIN) $< $@
+
 factory_wstage1.bin: $(BINASSEMBLE) stage1/loader_stage1.bin wolfboot.bin $(BOOT_IMG) $(PRIVATE_KEY) test-app/image_v1_signed.bin
 	@echo "\t[MERGE] $@"
 	$(Q)$(BINASSEMBLE) $@ \
@@ -509,6 +513,7 @@ $(LSCRIPT): $(LSCRIPT_IN) FORCE
 
 hex: wolfboot.hex
 srec: wolfboot.srec
+factory-srec: factory.srec
 
 %.hex:%.elf
 	@echo "\t[ELF2HEX] $@"
@@ -541,7 +546,7 @@ clean:
 	$(Q)rm -f src/wc_secure_calls.o
 	$(Q)rm -f $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/*.o $(WOLFBOOT_LIB_WOLFTPM)/src/*.o $(WOLFBOOT_LIB_WOLFTPM)/hal/*.o $(WOLFBOOT_LIB_WOLFTPM)/examples/pcr/*.o
 	$(Q)rm -f $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/Renesas/*.o
-	$(Q)rm -f wolfboot.bin wolfboot.elf wolfboot.map test-update.rom wolfboot.hex
+	$(Q)rm -f wolfboot.bin wolfboot.elf wolfboot.map test-update.rom wolfboot.hex wolfboot.srec factory.srec
 	$(Q)rm -f $(MACHINE_OBJ) $(MAIN_TARGET) $(LSCRIPT)
 	$(Q)rm -f $(OBJS)
 	$(Q)rm -f tools/keytools/otp/otp-keystore-gen

config/examples/nxp-s32k142.config

@@ -0,0 +1,54 @@
+# wolfBoot configuration for NXP S32K142
+#
+# S32K142: Cortex-M4F, 256KB Flash, 32KB SRAM
+# Flash sector size: 2KB
+# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
+#
+# Build: cp config/examples/nxp-s32k142.config .config && make
+
+ARCH?=ARM
+CORTEX_M4?=1
+TARGET?=s32k1xx
+SIGN?=ECC256
+HASH?=SHA256
+DEBUG?=0
+VTOR?=1
+NO_ASM?=0
+EXT_FLASH?=0
+SPI_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=0
+WOLFBOOT_VERSION?=0
+V?=0
+SPMATH?=1
+RAM_CODE?=1
+DUALBANK_SWAP?=0
+
+# Disable MPU (S32K1xx MPU configuration needs customization)
+WOLFBOOT_NO_MPU?=1
+
+# Enable hardfault debugging
+DEBUG_HARDFAULT?=0
+
+# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
+DEBUG_UART?=0
+
+# 2KB sectors (S32K142 only - larger variants use 4KB sectors)
+WOLFBOOT_SECTOR_SIZE?=0x800
+
+# Memory layout for S32K142 (256KB Flash):
+#   Bootloader:       0x00000000 - 0x0000BFFF (48 KB)
+#   Boot Partition:   0x0000C000 - 0x00024FFF (100 KB)
+#   Update Partition: 0x00025000 - 0x0003DFFF (100 KB)
+#   Swap Sector:      0x0003E000 - 0x0003E7FF (2 KB)
+WOLFBOOT_PARTITION_SIZE?=0x19000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x25000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x3E000
+
+# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
+# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
+#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
+
+# Optionally enable watchdog
+#CFLAGS_EXTRA+=-DWATCHDOG

config/examples/nxp-s32k144.config

@@ -0,0 +1,57 @@
+# wolfBoot configuration for NXP S32K144
+#
+# S32K144: Cortex-M4F, 512KB Flash, 64KB SRAM
+# Flash sector size: 4KB (larger flash variants use 4KB sectors)
+# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
+#
+# Build: cp config/examples/nxp-s32k144.config .config && make
+
+ARCH?=ARM
+CORTEX_M4?=1
+TARGET?=s32k1xx
+SIGN?=ECC256
+HASH?=SHA256
+DEBUG?=0
+VTOR?=1
+NO_ASM?=0
+EXT_FLASH?=0
+SPI_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=0
+WOLFBOOT_VERSION?=0
+V?=0
+SPMATH?=1
+RAM_CODE?=1
+DUALBANK_SWAP?=0
+
+# Select S32K144 variant for correct flash size and sector size
+CFLAGS_EXTRA+=-DS32K144
+
+# Disable MPU (S32K1xx MPU configuration needs customization)
+WOLFBOOT_NO_MPU?=1
+
+# Enable hardfault debugging
+#CFLAGS_EXTRA+=-DDEBUG_HARDFAULT
+
+# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
+DEBUG_UART?=0
+
+# 4KB sectors (S32K144/146/148 with 512KB+ flash)
+WOLFBOOT_SECTOR_SIZE?=0x1000
+
+# Memory layout for S32K144 (512KB Flash):
+#   Bootloader:       0x00000000 - 0x0000BFFF (48 KB)
+#   Boot Partition:   0x0000C000 - 0x00043FFF (224 KB)
+#   Update Partition: 0x00044000 - 0x0007BFFF (224 KB)
+#   Swap Sector:      0x0007C000 - 0x0007CFFF (4 KB)
+WOLFBOOT_PARTITION_SIZE?=0x38000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x44000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x7C000
+
+# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
+# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
+#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
+
+# Optionally enable watchdog
+#CFLAGS_EXTRA+=-DWATCHDOG

config/examples/nxp-s32k146.config

@@ -0,0 +1,57 @@
+# wolfBoot configuration for NXP S32K146
+#
+# S32K146: Cortex-M4F, 1MB Flash, 128KB SRAM
+# Flash sector size: 4KB (larger flash variants use 4KB sectors)
+# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
+#
+# Build: cp config/examples/nxp-s32k146.config .config && make
+
+ARCH?=ARM
+CORTEX_M4?=1
+TARGET?=s32k1xx
+SIGN?=ECC256
+HASH?=SHA256
+DEBUG?=0
+VTOR?=1
+NO_ASM?=0
+EXT_FLASH?=0
+SPI_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=0
+WOLFBOOT_VERSION?=0
+V?=0
+SPMATH?=1
+RAM_CODE?=1
+DUALBANK_SWAP?=0
+
+# Select S32K146 variant for correct flash size and sector size
+CFLAGS_EXTRA+=-DS32K146
+
+# Disable MPU (S32K1xx MPU configuration needs customization)
+WOLFBOOT_NO_MPU?=1
+
+# Enable hardfault debugging
+#CFLAGS_EXTRA+=-DDEBUG_HARDFAULT
+
+# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
+DEBUG_UART?=0
+
+# 4KB sectors (S32K144/146/148 with 512KB+ flash)
+WOLFBOOT_SECTOR_SIZE?=0x1000
+
+# Memory layout for S32K146 (1MB Flash):
+#   Bootloader:       0x00000000 - 0x0000BFFF (48 KB)
+#   Boot Partition:   0x0000C000 - 0x0007FFFF (464 KB)
+#   Update Partition: 0x00080000 - 0x000F3FFF (464 KB)
+#   Swap Sector:      0x000F4000 - 0x000F4FFF (4 KB)
+WOLFBOOT_PARTITION_SIZE?=0x74000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x80000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xF4000
+
+# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
+# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
+#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
+
+# Optionally enable watchdog
+#CFLAGS_EXTRA+=-DWATCHDOG

config/examples/nxp-s32k148.config

@@ -0,0 +1,57 @@
+# wolfBoot configuration for NXP S32K148
+#
+# S32K148: Cortex-M4F, 2MB Flash, 256KB SRAM
+# Flash sector size: 4KB (larger flash variants use 4KB sectors)
+# Default: RUN mode at 48 MHz (FIRC - internal RC oscillator)
+#
+# Build: cp config/examples/nxp-s32k148.config .config && make
+
+ARCH?=ARM
+CORTEX_M4?=1
+TARGET?=s32k1xx
+SIGN?=ECC256
+HASH?=SHA256
+DEBUG?=0
+VTOR?=1
+NO_ASM?=0
+EXT_FLASH?=0
+SPI_FLASH?=0
+ALLOW_DOWNGRADE?=0
+NVM_FLASH_WRITEONCE?=0
+WOLFBOOT_VERSION?=0
+V?=0
+SPMATH?=1
+RAM_CODE?=1
+DUALBANK_SWAP?=0
+
+# Select S32K148 variant for correct flash size and sector size
+CFLAGS_EXTRA+=-DS32K148
+
+# Disable MPU (S32K1xx MPU configuration needs customization)
+WOLFBOOT_NO_MPU?=1
+
+# Enable hardfault debugging
+#CFLAGS_EXTRA+=-DDEBUG_HARDFAULT
+
+# Debug UART on LPUART1 (PTC6=RX, PTC7=TX)
+DEBUG_UART?=0
+
+# 4KB sectors (S32K144/146/148 with 512KB+ flash)
+WOLFBOOT_SECTOR_SIZE?=0x1000
+
+# Memory layout for S32K148 (2MB Flash):
+#   Bootloader:       0x00000000 - 0x0000BFFF (48 KB)
+#   Boot Partition:   0x0000C000 - 0x000FBFFF (960 KB)
+#   Update Partition: 0x000FC000 - 0x001EBFFF (960 KB)
+#   Swap Sector:      0x001EC000 - 0x001ECFFF (4 KB)
+WOLFBOOT_PARTITION_SIZE?=0xF0000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xC000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xFC000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1EC000
+
+# Clock mode: Default is RUN mode with FIRC (48 MHz internal RC)
+# To enable HSRUN mode (112 MHz), uncomment below (requires SOSC + SPLL, not fully implemented):
+#CFLAGS_EXTRA+=-DS32K1XX_CLOCK_HSRUN
+
+# Optionally enable watchdog
+#CFLAGS_EXTRA+=-DWATCHDOG