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Andrew Zonenberg edited this page Feb 14, 2016 · 26 revisions

Welcome to the open FPGA tools wiki! Note: This project is NOT affiliated with OpenFPGA INC.

List of targets, notes, status, etc.

| Device | Status | Notes | | Xilinx CoolRunner-II | Most of bitstream mapping done, partial place-and-route, no HDL integration | TODO: merge code from azonenberg's internal SVN | | Silego Greenpak4 | Initial progress on C++ object model | Bitstream is publicly doc'd | | Cypress PSoC 5| Not yet started | TODO |

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