PSoC Patents

Patents of Interest

US8026739 (wiki, Google): Details the architecture of the programmable logic part of the PSoC 3, 4, and 5(LP).

List of Potentially-relevant Patents

Patent	Description
US20080258760	System level interconnect with programmable switching
US20080263319	Universal digital block with integrated arithmetic logic unit
US20080263334	Dynamically configurable and re-configurable data path
US5502403	High speed configuration independent programmable macrocell
US5799176	Method and apparatus for providing clock signals to macrocells of logic devices
US5966027	Symmetric logic block input/output scheme
US6134181	Configurable memory block
US6140853	Digital phase detector and charge pump system reset and balanced current source matching
US6275117	Circuit and method for controlling an output of a ring oscillator
US6338109	Microcontroller development system and applications thereof for development of a universal serial bus microcontroller
US6526470	Fifo bus-sizing, bus-matching datapath architecture
US6711226	Linearized digital phase-locked loop
US6864710	Programmable logic device
US6910126	Programming methodology and architecture for a programmable analog system
US6971004	System and method of dynamically reconfiguring a programmable integrated circuit
US7068205	Circuit, method, and apparatus for continuously variable analog to digital conversion
US7221187	Programmable microcontroller architecture (mixed analog/digital)
US8026739	System level interconnect with programmable switching
US8476928	System level interconnect with programmable switching
US8601254	Configurable reset pin for input/output port
US8639850	Addressing scheme to allow flexible mapping of functions in a programmable logic array
US8736303	PSOC architecture
WO2008131136A1	Universal digital block interconnection and channel routing