[LoadStoreOpToLLVM] Transpose 2d load.

[chengjunlu]

To use the transpose 2d block io to load column major matrix from global memory. (The column major matrix here could be generalized to the cases that fast change dimension of register layout is not same as the fast change dim on global memory.)

The 2d block io only can transpose the matrix of i32 type when load matrix from memory to register. To transpose the matrix of type bits number < 32, we need to further transpose matrix inside the register.

The steps the to load matrix with transposing with 2D block IO:

1. To load the matrix as d32 type matrix from memory with transposed to register.
2. (Optional if scalar type < 32 bits) To transpose the MxNxd32 to Mx(32/m)xNxdm inside the register.

Right now we only use the bitcast operation to transpose the matrix of which the width is equal to the threads per warp for step 2.

Further we will support more matrix of which the width is not equal to the threads per warp.

[Copilot]

Pull Request Overview

This draft PR implements transpose 2D block load functionality to efficiently load column major matrices from global memory on Intel Xe+ GPUs. The implementation introduces a transpose operation when the register layout's fast-changing dimension differs from the memory layout, using d32 type matrices with bitcast operations for the transformation.

• Added support for transpose 2D block IO operations with transpose parameter
• Enhanced block IO tile size calculation to handle transpose scenarios
• Implemented new test coverage for transpose and column major load operations

Reviewed Changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 8 comments.

File	Description
LoadStoreOpToLLVM.cpp	Major refactoring of 2D block load implementation to support transpose operations and simplified layout handling
tensor-pointer-load-block-2d.mlir	Updated test expectations for new block load configurations and tile sizes
test_block_store.py	Added transpose parameter and column major test cases for block operations

[chengjunlu]

The improvements will be added in another PR to minimal the changes in a single PR.

[Copilot]

Pull Request Overview

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

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[chengjunlu]

@whitneywhtsang @etiotto , The transpose loading is ready for review.

[whitneywhtsang]

Can you fix the typo in the image of the PR description or remove it?

[whitneywhtsang]

why would we call getStride with dim more than the size of stride?

[chengjunlu]

This is not a typical case in real Triton kernel but for LIT test cases.

There are simple LIT cases which is not real input kernel by user, like this

intel-xpu-backend-for-triton/test/TritonIntelGPU/tensor-pointer-load-block-2d.mlir

Line 345 in 248ae4c

tt.func public @regular_pointer_gather_io(%arg0: tensor<128x64x!tt.ptr<f16>, #mma>,

The arguments of tensor type of the function is converted to LLVM struct type before the axis info analysis pass run. The axis info initilize the AxisInfo with only one dimenssion for those non-tensor type. The original code will dereference the stride information with dim > 1 which is out of the boundary of the AxisInfo for the operands.

This is just a simple protection to return unknown stride for out-of-boundary dim of AxisInfo.

[chengjunlu]

Can you fix the typo in the image of the PR description or remove it?

Description has been updated for the code of this PR.